Design and Implementation of a Novel Multilevel DC-AC Inverter

Cheng Han Hsieh; Tsorng Juu Liang; Shih Ming Chen; Shih Wen Tsai

doi:10.1109/TIA.2016.2527622

Design and Implementation of a Novel Multilevel DC-AC Inverter

Cheng Han Hsieh, Tsorng Juu Liang, Shih Ming Chen, Shih Wen Tsai

Department of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

78 Citations (Scopus)

Abstract

In this paper, a novel multilevel dc-ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals' design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 V_rms/2 kW is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.

Original language	English
Article number	7403964
Pages (from-to)	2436-2443
Number of pages	8
Journal	IEEE Transactions on Industry Applications
Volume	52
Issue number	3
DOIs	https://doi.org/10.1109/TIA.2016.2527622
Publication status	Published - 2016 May 1

All Science Journal Classification (ASJC) codes

Control and Systems Engineering
Industrial and Manufacturing Engineering
Electrical and Electronic Engineering

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10.1109/TIA.2016.2527622

Cite this

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abstract = "In this paper, a novel multilevel dc-ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals' design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 Vrms/2 kW is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.",

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Design and Implementation of a Novel Multilevel DC-AC Inverter

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