Design and implementation of punctured viterbi decoder with full decoding capability for DAB system

Developing low-cost Eureka-147 Digital Audio Broadcasting (DAB) products is an attractive topic in a variety of applications. Of the major techniques to build a DAB receiver, the punctured Viterbi decoder (VD) is one of the key components highly suitable for ASIC implementation. This paper describes VLSI design and implementation of the punctured VD with full decoding capability for the DAB system. Since efficient memory management is always the key issue for successfully realizing VDs, we emphasize how to efficiently manage the path metric/survivor memories and try to minimize the hardware requirements under DAB specifications. For the path metric updating, we develop a simple but efficient conflict-free address arrangement method to increase the equivalent memory bandwidth. For the survivor memory management, we implement the block-based trace-back method according to the constraint length of the encoder. Results show that our memory arrangement is systematic and efficient, and the resulting VD design has the characteristics of modular design, consuming less silicon area, and facilitating the extension for higher transmission rate requirements.