Design and test of a highthroughput CABAC encoder

Chia Cheng Lo, Ying Jhong Zeng, Ming Der Shieh

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)


The inherent data dependency and various types of syntax elements existing in the CABAC encoding process will result in dramatically increased complexity if two bins obtained from binarizing syntax elements are handled per clock cycle. By analyzing the distribution of binarized bins in different video sequences, we show how to efficiently improve the encoding rate with a limited increase in hardware complexity by only allowing a certain type of syntax elements to be processed two bins at a time. Together with the presented range renovation reordering and memory arrangement schemes, our design can achieve an encoding rate of up to 270 Mbps with very limited hardware overhead. Meanwhile, we also describe techniques to effectively test the manufacture faults in chip implementation. Experimental results exhibit the advantages of employing the developed design and test schemes.

Original languageEnglish
Title of host publicationTENCON 2007 - 2007 IEEE Region 10 Conference
Publication statusPublished - 2007
EventIEEE Region 10 Conference, TENCON 2007 - Taipei, Taiwan
Duration: 2007 Oct 302007 Nov 2

Publication series

NameIEEE Region 10 Annual International Conference, Proceedings/TENCON


OtherIEEE Region 10 Conference, TENCON 2007

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering


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