Design Considerations with Augmented Spacer Dielectric for Vertically Stacked Gate-All-Around MOSFET,

Ya Chi Huang, Shi Hao Chen, Meng-Hsueh Chiang, Shui-Jinn Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationIEEE Semiconductor Interface Specialists Conference
Publication statusPublished - 2018 May 21

Cite this

Huang, Y. C., Chen, S. H., Chiang, M-H., & Wang, S-J. (2018). Design Considerations with Augmented Spacer Dielectric for Vertically Stacked Gate-All-Around MOSFET, In IEEE Semiconductor Interface Specialists Conference