@inproceedings{a41ab35b94bf4d1fac5e65d3642b9204,
title = "Design of 60-GHz 90-nm CMOS balanced power amplifier with miniaturized quadrature hybrids",
abstract = "This paper presents a 60-GHz CMOS balanced power amplifier (PA) with miniaturized quadrature hybrids using 90-nm CMOS technology. To improve the output power and provide an area-efficient solution for the balanced PA design, a compact 3-dB quadrature hybrid constructed by a broadside-coupled scheme is employed as a low-insertion-loss power splitter/combiner. With a very short effective guided wavelength of 0.072 λg, the simulated insertion loss and phase difference of the quadrature hybrids are better than 0.5 dB and 90° ± 0.2°, respectively. The designed PA reaches a power gain exceeding 13.2 dB and a saturation power of 10.7 dBm with a power-added efficiency (PAE) more than 9 % at 60 GHz. The power consumption of the PA is 109 mW at a 1.2 V supply voltage. The chip size is 0.68 mm 2.",
author = "Lin, {Chien Chih} and Yu, {Chun Han} and Kuo, {Hsin Chih} and Huey-Ru Chuang",
year = "2014",
month = jan,
day = "1",
doi = "10.1109/PAWR.2014.6825723",
language = "English",
isbn = "9781479927784",
series = "PAWR 2014 - Proceedings: 2014 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications",
publisher = "IEEE Computer Society",
pages = "52--54",
booktitle = "PAWR 2014 - Proceedings",
address = "United States",
note = "2014 IEEE Topical Conference on Power Amplifiers for Wireless and Radio Applications, PAWR 2014 ; Conference date: 19-01-2014 Through 22-01-2014",
}