Design of 60-GHz millimeter-wave CMOS RFIC-on-chip bandpass filter

Cheng Ying Hsu; Huey Ru Chuang; Chu Yu Chen

doi:10.1109/EUMC.2007.4405281

Design of 60-GHz millimeter-wave CMOS RFIC-on-chip bandpass filter

Cheng Ying Hsu, Huey Ru Chuang, Chu Yu Chen

Institute of Computer and Communication Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

17 Citations (Scopus)

Abstract

This paper presents design and implementation of a 60-GHz millimeter-wave RFIC-on-chip bandpass filter with a 0.18-p.m standard CMOS process. A planar ring resonator structure with dual transmission zeros was adopted to design this CMOS filter. The die size of the chip is 1.148 × 1.49 mm². The measured insertion loss of a designed bandpass is less than 5 dB from 59 to 68 GHz. The investigations of sensitivity to the insertion loss and the passband bandwidth for different perturbation stub sizes are also studied. The filter has a 5-dB bandwidth of about 9 GHz at the center frequency of 64 GHz. The measured insertion loss of the passband is about 4.9 dB and the return loss is better than 10 dB within passband.

Original language	English
Title of host publication	Proceedings of the 37th European Microwave Conference, EUMC
Pages	672-675
Number of pages	4
DOIs	https://doi.org/10.1109/EUMC.2007.4405281
Publication status	Published - 2007 Dec 1
Event	37th European Microwave Conference, EUMC - Munich, Germany Duration: 2007 Oct 9 → 2007 Oct 12

Publication series

Name	Proceedings of the 37th European Microwave Conference, EUMC

Other

Other	37th European Microwave Conference, EUMC
Country	Germany
City	Munich
Period	07-10-09 → 07-10-12

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/EUMC.2007.4405281

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title = "Design of 60-GHz millimeter-wave CMOS RFIC-on-chip bandpass filter",

abstract = "This paper presents design and implementation of a 60-GHz millimeter-wave RFIC-on-chip bandpass filter with a 0.18-p.m standard CMOS process. A planar ring resonator structure with dual transmission zeros was adopted to design this CMOS filter. The die size of the chip is 1.148 × 1.49 mm2. The measured insertion loss of a designed bandpass is less than 5 dB from 59 to 68 GHz. The investigations of sensitivity to the insertion loss and the passband bandwidth for different perturbation stub sizes are also studied. The filter has a 5-dB bandwidth of about 9 GHz at the center frequency of 64 GHz. The measured insertion loss of the passband is about 4.9 dB and the return loss is better than 10 dB within passband.",

author = "Hsu, {Cheng Ying} and Chuang, {Huey Ru} and Chen, {Chu Yu}",

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N2 - This paper presents design and implementation of a 60-GHz millimeter-wave RFIC-on-chip bandpass filter with a 0.18-p.m standard CMOS process. A planar ring resonator structure with dual transmission zeros was adopted to design this CMOS filter. The die size of the chip is 1.148 × 1.49 mm2. The measured insertion loss of a designed bandpass is less than 5 dB from 59 to 68 GHz. The investigations of sensitivity to the insertion loss and the passband bandwidth for different perturbation stub sizes are also studied. The filter has a 5-dB bandwidth of about 9 GHz at the center frequency of 64 GHz. The measured insertion loss of the passband is about 4.9 dB and the return loss is better than 10 dB within passband.

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Design of 60-GHz millimeter-wave CMOS RFIC-on-chip bandpass filter

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