Design of a 60-GHz down-converting dual-gate mixer in 130-nm CMOS technology

Hsin Chih Kuo, Chu Yun Yang, Jin Fu Yeh, Huey Ru Chuang, Tzuen Hsi Huang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

A 60-GHz down-converting dual-gate mixer, fabricated in the 0.13-μm CMOS process, for WPAN applications is presented. The mixer utilizes the dual-gate topology and adds a buffer to avoid loading effects. A good agreement between simulation and measurements is observed. The mixer exhibits a conversion loss of 2.7 dB, input 1-dB compression point of -8 dBm at RF of 60 GHz, IF of 5 GHz and LO power of 0 dBm. The total power consumption is 16.8 mW, 7.2 mW for the core mixer and 9.6 mW for the buffer.

Original languageEnglish
Title of host publicationEuropean Microwave Week 2009, EuMW 2009
Subtitle of host publicationScience, Progress and Quality at Radiofrequencies, Conference Proceedings - 39th European Microwave Conference, EuMC 2009
Pages405-408
Number of pages4
DOIs
Publication statusPublished - 2009 Dec 1
EventEuropean Microwave Week 2009, EuMW 2009: Science, Progress and Quality at Radiofrequencies - 39th European Microwave Conference, EuMC 2009 - Rome, Italy
Duration: 2009 Sep 282009 Oct 2

Publication series

NameEuropean Microwave Week 2009, EuMW 2009: Science, Progress and Quality at Radiofrequencies, Conference Proceedings - 39th European Microwave Conference, EuMC 2009

Other

OtherEuropean Microwave Week 2009, EuMW 2009: Science, Progress and Quality at Radiofrequencies - 39th European Microwave Conference, EuMC 2009
Country/TerritoryItaly
CityRome
Period09-09-2809-10-02

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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