Design of a color reproduction neural network chip with on-chip learning capability

Jar Shone Ker, Yau-Hwang Kuo, Bin-Da Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The process of eliminating color errors from the gamut mismatch, resolution conversion, quantization and non-linearity between scanner and printer is an essential issue of color reproduction. To efficiently calibrate the non-linear color distortion characteristic between color scanner and printer and to enhance the reproduction quality of color document, we develop a hardware processing module, which realizes the operation of higher-order CMAC neural network model with linear systolic array architecture, to on-line calibrate the color during the reproducing session. This mapping scheme exhibits fast computation speed in evaluating the output responses of higher-order CMAC model.

Original languageEnglish
Title of host publicationIEEE International Conference on Image Processing
Editors Anon
PublisherIEEE
Pages1023-1026
Number of pages4
Volume2
Publication statusPublished - 1996
EventProceedings of the 1996 IEEE International Conference on Image Processing, ICIP'96. Part 2 (of 3) - Lausanne, Switz
Duration: 1996 Sep 161996 Sep 19

Other

OtherProceedings of the 1996 IEEE International Conference on Image Processing, ICIP'96. Part 2 (of 3)
CityLausanne, Switz
Period96-09-1696-09-19

Fingerprint

Color
Neural networks
Systolic arrays
Hardware
Processing

All Science Journal Classification (ASJC) codes

  • Computer Vision and Pattern Recognition
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Ker, J. S., Kuo, Y-H., & Liu, B-D. (1996). Design of a color reproduction neural network chip with on-chip learning capability. In Anon (Ed.), IEEE International Conference on Image Processing (Vol. 2, pp. 1023-1026). IEEE.
Ker, Jar Shone ; Kuo, Yau-Hwang ; Liu, Bin-Da. / Design of a color reproduction neural network chip with on-chip learning capability. IEEE International Conference on Image Processing. editor / Anon. Vol. 2 IEEE, 1996. pp. 1023-1026
@inproceedings{118ff8e0961a46379908a539cc5edf86,
title = "Design of a color reproduction neural network chip with on-chip learning capability",
abstract = "The process of eliminating color errors from the gamut mismatch, resolution conversion, quantization and non-linearity between scanner and printer is an essential issue of color reproduction. To efficiently calibrate the non-linear color distortion characteristic between color scanner and printer and to enhance the reproduction quality of color document, we develop a hardware processing module, which realizes the operation of higher-order CMAC neural network model with linear systolic array architecture, to on-line calibrate the color during the reproducing session. This mapping scheme exhibits fast computation speed in evaluating the output responses of higher-order CMAC model.",
author = "Ker, {Jar Shone} and Yau-Hwang Kuo and Bin-Da Liu",
year = "1996",
language = "English",
volume = "2",
pages = "1023--1026",
editor = "Anon",
booktitle = "IEEE International Conference on Image Processing",
publisher = "IEEE",

}

Ker, JS, Kuo, Y-H & Liu, B-D 1996, Design of a color reproduction neural network chip with on-chip learning capability. in Anon (ed.), IEEE International Conference on Image Processing. vol. 2, IEEE, pp. 1023-1026, Proceedings of the 1996 IEEE International Conference on Image Processing, ICIP'96. Part 2 (of 3), Lausanne, Switz, 96-09-16.

Design of a color reproduction neural network chip with on-chip learning capability. / Ker, Jar Shone; Kuo, Yau-Hwang; Liu, Bin-Da.

IEEE International Conference on Image Processing. ed. / Anon. Vol. 2 IEEE, 1996. p. 1023-1026.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Design of a color reproduction neural network chip with on-chip learning capability

AU - Ker, Jar Shone

AU - Kuo, Yau-Hwang

AU - Liu, Bin-Da

PY - 1996

Y1 - 1996

N2 - The process of eliminating color errors from the gamut mismatch, resolution conversion, quantization and non-linearity between scanner and printer is an essential issue of color reproduction. To efficiently calibrate the non-linear color distortion characteristic between color scanner and printer and to enhance the reproduction quality of color document, we develop a hardware processing module, which realizes the operation of higher-order CMAC neural network model with linear systolic array architecture, to on-line calibrate the color during the reproducing session. This mapping scheme exhibits fast computation speed in evaluating the output responses of higher-order CMAC model.

AB - The process of eliminating color errors from the gamut mismatch, resolution conversion, quantization and non-linearity between scanner and printer is an essential issue of color reproduction. To efficiently calibrate the non-linear color distortion characteristic between color scanner and printer and to enhance the reproduction quality of color document, we develop a hardware processing module, which realizes the operation of higher-order CMAC neural network model with linear systolic array architecture, to on-line calibrate the color during the reproducing session. This mapping scheme exhibits fast computation speed in evaluating the output responses of higher-order CMAC model.

UR - http://www.scopus.com/inward/record.url?scp=0030397249&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0030397249&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0030397249

VL - 2

SP - 1023

EP - 1026

BT - IEEE International Conference on Image Processing

A2 - Anon, null

PB - IEEE

ER -

Ker JS, Kuo Y-H, Liu B-D. Design of a color reproduction neural network chip with on-chip learning capability. In Anon, editor, IEEE International Conference on Image Processing. Vol. 2. IEEE. 1996. p. 1023-1026