Determining adhesion and hermeticity of the interface between encapsulation polymer and insulating layer of micro-sensing chips via a capacitance-voltage technique

Yu-Sheng Lin, Jyh-Ming Ting, Tse Chuan Chou, Chien Cheng Li, Jow-Lay Huang

Research output: Contribution to journalArticlepeer-review

Abstract

The successful application of micro-sensing chips based on ion-sensitive field effect transistor principles depends on preventing the penetration of electrolyte into the interface between the encapsulation polymer and the insulating layer. This study employs a capacitance-voltage (C-V) technique to evaluate the adhesion and hermeticity of the polymer-substrate interface in a liquid environment. Three-layered structures simulating micro-sensing chips were fabricated for the evaluation. Each three-layered structure comprises an upper epoxy layer (with or without a window opening), a middle dielectric layer, and a lower Si wafer substrate. Equivalent circuits were established to explain the C-V characteristics of the three-layered structures. The results show that by applying the C-V technique and using an appropriate equivalent circuit, the adhesion and hermeticity between the encapsulating epoxy layer and the insulating layer can be evaluated.

Original languageEnglish
Pages (from-to)6827-6832
Number of pages6
JournalThin Solid Films
Volume515
Issue number17
DOIs
Publication statusPublished - 2007 Jun 1

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Surfaces and Interfaces
  • Surfaces, Coatings and Films
  • Metals and Alloys
  • Materials Chemistry

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