TY - JOUR
T1 - Development of a Thermoelectric Energy Generator Chip of Small Layout and High Power/Voltage Factors by Foundry Service
AU - Yang, S. M.
AU - Wang, J. Y.
AU - Chen, M. D.
AU - Tsai, M. H.
N1 - Funding Information:
Manuscript received April 25, 2019; accepted June 5, 2019. Date of publication June 21, 2019; date of current version September 18, 2019. This work was supported in part by the Ministry of Science and Technology, Taiwan, under Grant 105-2221-E006-110-MY3. The associate editor coordinating the review of this paper and approving it for publication was Prof. Diego Barrettino. (Corresponding author: S. M. Yang.) S. M. Yang, J. Y. Wang, and M. D. Chen are with the Department of Aeronautics and Astronautics, National Cheng Kung University, Tainan 701-01, Taiwan (e-mail: [email protected]).
Publisher Copyright:
© 2001-2012 IEEE.
PY - 2019/10/15
Y1 - 2019/10/15
N2 - Thermoelectric energy generator (TEG) is a device which is used to convert temperature difference between the hot and cold junctions into electrical energy. This paper aims at developing a TEG chip of small layout 5 mm2 having three 2.01 mm ×0.72 mm cells in a total of 10 080 thermocouples by semiconductor foundry service (TSMC) for the advantages in batch production, low cost, and scalability. The design has the unique features to improve TEG performance by having (1) thin-film polycrystalline silicon-germanium Si0.9Ge0.1 layer for higher thermoelectric conversion efficiency, (2) isolation cavity for better thermal insulation, and (3) structural support for improved thermocouple dimensional stability. It is shown that the TEG chip can deliver power factor 0.125μ W/cm2K2 and voltage factor 25.91 V/cm2 K. The experimental verification demonstrates that the 5 mm2 chip has output power 2.083μ W and voltage 3.4 V at 20 K temperature gradient. This is by far the TEG design with best thermoelectric performance implemented by the semiconductor foundry service.
AB - Thermoelectric energy generator (TEG) is a device which is used to convert temperature difference between the hot and cold junctions into electrical energy. This paper aims at developing a TEG chip of small layout 5 mm2 having three 2.01 mm ×0.72 mm cells in a total of 10 080 thermocouples by semiconductor foundry service (TSMC) for the advantages in batch production, low cost, and scalability. The design has the unique features to improve TEG performance by having (1) thin-film polycrystalline silicon-germanium Si0.9Ge0.1 layer for higher thermoelectric conversion efficiency, (2) isolation cavity for better thermal insulation, and (3) structural support for improved thermocouple dimensional stability. It is shown that the TEG chip can deliver power factor 0.125μ W/cm2K2 and voltage factor 25.91 V/cm2 K. The experimental verification demonstrates that the 5 mm2 chip has output power 2.083μ W and voltage 3.4 V at 20 K temperature gradient. This is by far the TEG design with best thermoelectric performance implemented by the semiconductor foundry service.
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U2 - 10.1109/JSEN.2019.2924256
DO - 10.1109/JSEN.2019.2924256
M3 - Article
AN - SCOPUS:85072516027
SN - 1530-437X
VL - 19
SP - 9149
EP - 9155
JO - IEEE Sensors Journal
JF - IEEE Sensors Journal
IS - 20
M1 - 8743440
ER -