TY - JOUR
T1 - Device linear improvement using SiGe/Si heterostructure delta-doped-channel field-effect transistors
AU - Chien, Pei Wei
AU - Wu, San Lein
AU - Chang, Shoou Jinn
AU - Wang, Yan Ping
AU - Miura, Hidetoshi
AU - Shiraki, Yasuhiro
PY - 2000/11/15
Y1 - 2000/11/15
N2 - Results of boron delta-doped-channel (DDC) field-effect transistors fabricated on Si0.7Ge0.3/Si strained-layer heterostructures grown by solid-source molecular beam epitaxy (SSMBE) are reported. A device with a 1×100 μm2 gate exhibits an extrinsic transconductance as high as 22 mS/mm. Due to the absence of parallel conduction effects under high-current-level operation in this device, as compared to a modulation-doped structure, a wide and flat range of uniform gm distribution of 4.5 V together with a high gate-to-drain breakdown voltage (>25 V) and high current density of 120 mA/mm is obtained at room temperature, which is expected to provide an additional degree of freedom for Si-based device applications.
AB - Results of boron delta-doped-channel (DDC) field-effect transistors fabricated on Si0.7Ge0.3/Si strained-layer heterostructures grown by solid-source molecular beam epitaxy (SSMBE) are reported. A device with a 1×100 μm2 gate exhibits an extrinsic transconductance as high as 22 mS/mm. Due to the absence of parallel conduction effects under high-current-level operation in this device, as compared to a modulation-doped structure, a wide and flat range of uniform gm distribution of 4.5 V together with a high gate-to-drain breakdown voltage (>25 V) and high current density of 120 mA/mm is obtained at room temperature, which is expected to provide an additional degree of freedom for Si-based device applications.
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U2 - 10.1143/jjap.39.l1149
DO - 10.1143/jjap.39.l1149
M3 - Article
AN - SCOPUS:0034315138
SN - 0021-4922
VL - 39
SP - L1149-L1151
JO - Japanese journal of applied physics
JF - Japanese journal of applied physics
IS - 11 B
ER -