Diagnosis for MRAM write disturbance fault

Chin Lung Su, Chih Wea Tsai, Cheng Wen Wu, Ji Jan Chen, Wen Ching Wu, Chien Chung Hung, Ming Jer Kao

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)


To help improve quality and yield of magnetic random access memory (MRAM), we propose an adaptive diagnosis algorithm (ADA) that can efficiently identify the write disturbance fault (WDF) for MRAM. The proposed test algorithm is a March-based one, i.e., it has linear time complexity and can easily be implemented with built-in self-test (BIST). However, the proposed test method can evaluate the process stability and uniformity using logical test method. We also develop a BIST circuit that supports the proposed WDF diagnosis test method. We propose the BIST scheme based on the Decision Write mechanism of the toggle MRAM to reduce total test time. A 1Mb toggle MRAM prototype chip with the proposed BIST circuit has been designed and fabricated using a special 0.15μm CMOS technology. The BIST circuit overhead is only about 0.04% with respect to the 1Mb MRAM. The test time is reduced by about 30% as compared with the test method without using the Decision Write mechanism.

Original languageEnglish
Title of host publication2007 IEEE International Test Conference, ITC
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)1424411289, 9781424411283
Publication statusPublished - 2008 Mar 3
Event2007 IEEE International Test Conference, ITC - Santa Clara, CA, United States
Duration: 2007 Oct 232007 Oct 25

Publication series

NameProceedings - International Test Conference
ISSN (Print)1089-3539


Conference2007 IEEE International Test Conference, ITC
Country/TerritoryUnited States
CitySanta Clara, CA

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Applied Mathematics


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