Digital-signal-processor-based DC/AC inverter with integral-compensation terminal sliding-mode control

F. J. Chang, E. C. Chang, Tsorng-Juu Liang, Jiann-Fuh Chen

Research output: Contribution to journalArticle

38 Citations (Scopus)

Abstract

Classic terminal sliding-mode control (TSMC) has finite system-state convergence time and is robust against system disturbances and uncertainties, but TSMC may suffer from steady-state error problems under disturbed-system conditions. This study proposes to improve the performance of TSMC by the addition of integral compensation, which eliminates steady-state errors in the DC/AC inverter. Thus, the proposed controller provides robust performance in controlling the DC/AC inverter output to track the sinusoidal reference at steady state, and also provides fast response under varying load conditions. A real-time digital-signal-processor-based laboratory prototype is implemented to confirm the theoretical analysis and effectiveness of the proposed controller.

Original languageEnglish
Pages (from-to)159-167
Number of pages9
JournalIET Power Electronics
Volume4
Issue number1
DOIs
Publication statusPublished - 2011 Jan 1

Fingerprint

Digital signal processors
Sliding mode control
Controllers
Compensation and Redress

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

@article{bef742e6adf4407b8d5957b438d75040,
title = "Digital-signal-processor-based DC/AC inverter with integral-compensation terminal sliding-mode control",
abstract = "Classic terminal sliding-mode control (TSMC) has finite system-state convergence time and is robust against system disturbances and uncertainties, but TSMC may suffer from steady-state error problems under disturbed-system conditions. This study proposes to improve the performance of TSMC by the addition of integral compensation, which eliminates steady-state errors in the DC/AC inverter. Thus, the proposed controller provides robust performance in controlling the DC/AC inverter output to track the sinusoidal reference at steady state, and also provides fast response under varying load conditions. A real-time digital-signal-processor-based laboratory prototype is implemented to confirm the theoretical analysis and effectiveness of the proposed controller.",
author = "Chang, {F. J.} and Chang, {E. C.} and Tsorng-Juu Liang and Jiann-Fuh Chen",
year = "2011",
month = "1",
day = "1",
doi = "10.1049/iet-pel.2010.0071",
language = "English",
volume = "4",
pages = "159--167",
journal = "IET Power Electronics",
issn = "1755-4535",
publisher = "Institution of Engineering and Technology",
number = "1",

}

Digital-signal-processor-based DC/AC inverter with integral-compensation terminal sliding-mode control. / Chang, F. J.; Chang, E. C.; Liang, Tsorng-Juu; Chen, Jiann-Fuh.

In: IET Power Electronics, Vol. 4, No. 1, 01.01.2011, p. 159-167.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Digital-signal-processor-based DC/AC inverter with integral-compensation terminal sliding-mode control

AU - Chang, F. J.

AU - Chang, E. C.

AU - Liang, Tsorng-Juu

AU - Chen, Jiann-Fuh

PY - 2011/1/1

Y1 - 2011/1/1

N2 - Classic terminal sliding-mode control (TSMC) has finite system-state convergence time and is robust against system disturbances and uncertainties, but TSMC may suffer from steady-state error problems under disturbed-system conditions. This study proposes to improve the performance of TSMC by the addition of integral compensation, which eliminates steady-state errors in the DC/AC inverter. Thus, the proposed controller provides robust performance in controlling the DC/AC inverter output to track the sinusoidal reference at steady state, and also provides fast response under varying load conditions. A real-time digital-signal-processor-based laboratory prototype is implemented to confirm the theoretical analysis and effectiveness of the proposed controller.

AB - Classic terminal sliding-mode control (TSMC) has finite system-state convergence time and is robust against system disturbances and uncertainties, but TSMC may suffer from steady-state error problems under disturbed-system conditions. This study proposes to improve the performance of TSMC by the addition of integral compensation, which eliminates steady-state errors in the DC/AC inverter. Thus, the proposed controller provides robust performance in controlling the DC/AC inverter output to track the sinusoidal reference at steady state, and also provides fast response under varying load conditions. A real-time digital-signal-processor-based laboratory prototype is implemented to confirm the theoretical analysis and effectiveness of the proposed controller.

UR - http://www.scopus.com/inward/record.url?scp=79551507647&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=79551507647&partnerID=8YFLogxK

U2 - 10.1049/iet-pel.2010.0071

DO - 10.1049/iet-pel.2010.0071

M3 - Article

AN - SCOPUS:79551507647

VL - 4

SP - 159

EP - 167

JO - IET Power Electronics

JF - IET Power Electronics

SN - 1755-4535

IS - 1

ER -