Discrete-time analysis of an all-digital and multirate symbol timing recovery scheme for sampling receivers

Mehmet R. Yuce, Ahmet Tekin, Wentai Liu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An all-digital symbol timing recovery technique that uses a 1-bit ADC, delay-XOR unit and a digital prefilter before the all-digital loop is analyzed. This approach provides a low-power, all-digital implementation in CMOS integrated circuit and exhibits very low jitter. The prefilter is arranged to eliminate frequency offsets on the input signal. The system is robust against fast and large Doppler shift and is therefore well suited for receivers in satellite applications. A symbol timing circuit based on this technique has been implemented for a wide range of bit rates (0.1-100 Kbps). It is synchronized within 3 or 4 bits in the presence of high carrier frequency offsets. A detailed performance study is carried out by both analytical simulation and hardware implementation to provide guidelines when the proposed scheme is applied to other transmission systems.

Original languageEnglish
Title of host publication2006 IEEE International Conference on Communications, ICC 2006
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages3235-3240
Number of pages6
ISBN (Print)1424403553, 9781424403554
DOIs
Publication statusPublished - 2006
Event2006 IEEE International Conference on Communications, ICC 2006 - Istanbul, Turkey
Duration: 2006 Jul 112006 Jul 15

Publication series

NameIEEE International Conference on Communications
Volume7
ISSN (Print)0536-1486

Other

Other2006 IEEE International Conference on Communications, ICC 2006
Country/TerritoryTurkey
CityIstanbul
Period06-07-1106-07-15

All Science Journal Classification (ASJC) codes

  • Computer Networks and Communications
  • Electrical and Electronic Engineering

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