Distinguishing dynamic bridging faults and transition delay faults

Cheng Hung Wu, Saint James Lee, Kuen Jong Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

The transition delay faults (TDF) model has been widely used in industry to model time-related defects. A dynamic bridging fault (DBF) also has similar delay effect. However, the causes of these two types of faults are quite different: a DBF is due to the bridging effects between two circuit nodes, while a TDF is due to a node itself or the logic connected to the node. It is important to distinguish these two types of faults such that the exact sources of defects can be identified during the yield ramping process. In this paper we analyze the relation of TDFs and DBFs and present an efficient diagnosis pattern generation procedure to distinguish them. A novel circuit model is developed which can transform the problem of distinguishing a pair of a DBF and a TDF into the problem of detecting a DBF. The pattern generation process can then be done by using an ATPG tool for DBFs. All fault pairs can be modeled in a single circuit and dealt with in the same ATPG run. Thus the pattern generation process is quite efficient and very compact pattern sets can be obtained. Experimental results on ISCAS89 benchmarks show that 99.99% of random fault pairs can be either distinguished or identified as equivalent-fault pairs.

Original languageEnglish
Title of host publicationProceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015
EditorsJunyan Ren, Ting-Ao Tang, Fan Ye, Huihua Yu
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479984831
DOIs
Publication statusPublished - 2016 Jul 21
Event11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015 - Chengdu, China
Duration: 2015 Nov 32015 Nov 6

Publication series

NameProceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015

Other

Other11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015
CountryChina
CityChengdu
Period15-11-0315-11-06

Fingerprint

Networks (circuits)
Defects
Industry

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Wu, C. H., Lee, S. J., & Lee, K. J. (2016). Distinguishing dynamic bridging faults and transition delay faults. In J. Ren, T-A. Tang, F. Ye, & H. Yu (Eds.), Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015 [7516978] (Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ASICON.2015.7516978
Wu, Cheng Hung ; Lee, Saint James ; Lee, Kuen Jong. / Distinguishing dynamic bridging faults and transition delay faults. Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. editor / Junyan Ren ; Ting-Ao Tang ; Fan Ye ; Huihua Yu. Institute of Electrical and Electronics Engineers Inc., 2016. (Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015).
@inproceedings{0e3b9baeddf24229a50a91614b0a56b9,
title = "Distinguishing dynamic bridging faults and transition delay faults",
abstract = "The transition delay faults (TDF) model has been widely used in industry to model time-related defects. A dynamic bridging fault (DBF) also has similar delay effect. However, the causes of these two types of faults are quite different: a DBF is due to the bridging effects between two circuit nodes, while a TDF is due to a node itself or the logic connected to the node. It is important to distinguish these two types of faults such that the exact sources of defects can be identified during the yield ramping process. In this paper we analyze the relation of TDFs and DBFs and present an efficient diagnosis pattern generation procedure to distinguish them. A novel circuit model is developed which can transform the problem of distinguishing a pair of a DBF and a TDF into the problem of detecting a DBF. The pattern generation process can then be done by using an ATPG tool for DBFs. All fault pairs can be modeled in a single circuit and dealt with in the same ATPG run. Thus the pattern generation process is quite efficient and very compact pattern sets can be obtained. Experimental results on ISCAS89 benchmarks show that 99.99{\%} of random fault pairs can be either distinguished or identified as equivalent-fault pairs.",
author = "Wu, {Cheng Hung} and Lee, {Saint James} and Lee, {Kuen Jong}",
year = "2016",
month = "7",
day = "21",
doi = "10.1109/ASICON.2015.7516978",
language = "English",
series = "Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
editor = "Junyan Ren and Ting-Ao Tang and Fan Ye and Huihua Yu",
booktitle = "Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015",
address = "United States",

}

Wu, CH, Lee, SJ & Lee, KJ 2016, Distinguishing dynamic bridging faults and transition delay faults. in J Ren, T-A Tang, F Ye & H Yu (eds), Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015., 7516978, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Institute of Electrical and Electronics Engineers Inc., 11th IEEE International Conference on Advanced Semiconductor Integrated Circuits (ASIC), ASICON 2015, Chengdu, China, 15-11-03. https://doi.org/10.1109/ASICON.2015.7516978

Distinguishing dynamic bridging faults and transition delay faults. / Wu, Cheng Hung; Lee, Saint James; Lee, Kuen Jong.

Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. ed. / Junyan Ren; Ting-Ao Tang; Fan Ye; Huihua Yu. Institute of Electrical and Electronics Engineers Inc., 2016. 7516978 (Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Distinguishing dynamic bridging faults and transition delay faults

AU - Wu, Cheng Hung

AU - Lee, Saint James

AU - Lee, Kuen Jong

PY - 2016/7/21

Y1 - 2016/7/21

N2 - The transition delay faults (TDF) model has been widely used in industry to model time-related defects. A dynamic bridging fault (DBF) also has similar delay effect. However, the causes of these two types of faults are quite different: a DBF is due to the bridging effects between two circuit nodes, while a TDF is due to a node itself or the logic connected to the node. It is important to distinguish these two types of faults such that the exact sources of defects can be identified during the yield ramping process. In this paper we analyze the relation of TDFs and DBFs and present an efficient diagnosis pattern generation procedure to distinguish them. A novel circuit model is developed which can transform the problem of distinguishing a pair of a DBF and a TDF into the problem of detecting a DBF. The pattern generation process can then be done by using an ATPG tool for DBFs. All fault pairs can be modeled in a single circuit and dealt with in the same ATPG run. Thus the pattern generation process is quite efficient and very compact pattern sets can be obtained. Experimental results on ISCAS89 benchmarks show that 99.99% of random fault pairs can be either distinguished or identified as equivalent-fault pairs.

AB - The transition delay faults (TDF) model has been widely used in industry to model time-related defects. A dynamic bridging fault (DBF) also has similar delay effect. However, the causes of these two types of faults are quite different: a DBF is due to the bridging effects between two circuit nodes, while a TDF is due to a node itself or the logic connected to the node. It is important to distinguish these two types of faults such that the exact sources of defects can be identified during the yield ramping process. In this paper we analyze the relation of TDFs and DBFs and present an efficient diagnosis pattern generation procedure to distinguish them. A novel circuit model is developed which can transform the problem of distinguishing a pair of a DBF and a TDF into the problem of detecting a DBF. The pattern generation process can then be done by using an ATPG tool for DBFs. All fault pairs can be modeled in a single circuit and dealt with in the same ATPG run. Thus the pattern generation process is quite efficient and very compact pattern sets can be obtained. Experimental results on ISCAS89 benchmarks show that 99.99% of random fault pairs can be either distinguished or identified as equivalent-fault pairs.

UR - http://www.scopus.com/inward/record.url?scp=84982304824&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84982304824&partnerID=8YFLogxK

U2 - 10.1109/ASICON.2015.7516978

DO - 10.1109/ASICON.2015.7516978

M3 - Conference contribution

AN - SCOPUS:84982304824

T3 - Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015

BT - Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015

A2 - Ren, Junyan

A2 - Tang, Ting-Ao

A2 - Ye, Fan

A2 - Yu, Huihua

PB - Institute of Electrical and Electronics Engineers Inc.

ER -

Wu CH, Lee SJ, Lee KJ. Distinguishing dynamic bridging faults and transition delay faults. In Ren J, Tang T-A, Ye F, Yu H, editors, Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015. Institute of Electrical and Electronics Engineers Inc. 2016. 7516978. (Proceedings - 2015 IEEE 11th International Conference on ASIC, ASICON 2015). https://doi.org/10.1109/ASICON.2015.7516978