DRAM system simulation speed-Up by effective-cycle selection

Han Chien Chiang, Mao Yin Wang, Cheng Weng Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Full system simulation is a developing methodology that aids to find the optimized configurations of system design. Huge amount of data is collected to better characterize the performance of the system. This process requires both accuracy and speed. Cycle-accurate modeling is precise but time and resource consuming. Higher abstraction level of modeling, such as transaction-level modeling, trades accuracy for speed. We propose a novel approach called 'Effective-cycle Selection' to reduce redundant check of command scheduler in memory controller without affecting the functionality. Redundant checks occur in the cycles in which no command would be issued by the command scheduler. By predicting effective cycles, the proposed method diminishes redundancy and speed up simulation by up to 40% in multi-program real workloads, while introducing zero error in simulation compared to the cycle-based simulator. To the best of our knowledge, this is the first research work which leverages the redundancy of memory command scheduling to accelerate simulation.

Original languageEnglish
Title of host publicationProceedings - 2014 International Symposium on Computer, Consumer and Control, IS3C 2014
PublisherIEEE Computer Society
Pages1053-1056
Number of pages4
ISBN (Print)9781479952779
DOIs
Publication statusPublished - 2014 Jan 1
Event2nd International Symposium on Computer, Consumer and Control, IS3C 2014 - Taichung, Taiwan
Duration: 2014 Jun 102014 Jun 12

Publication series

NameProceedings - 2014 International Symposium on Computer, Consumer and Control, IS3C 2014

Other

Other2nd International Symposium on Computer, Consumer and Control, IS3C 2014
CountryTaiwan
CityTaichung
Period14-06-1014-06-12

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Control and Systems Engineering

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  • Cite this

    Chiang, H. C., Wang, M. Y., & Wu, C. W. (2014). DRAM system simulation speed-Up by effective-cycle selection. In Proceedings - 2014 International Symposium on Computer, Consumer and Control, IS3C 2014 (pp. 1053-1056). [6846067] (Proceedings - 2014 International Symposium on Computer, Consumer and Control, IS3C 2014). IEEE Computer Society. https://doi.org/10.1109/IS3C.2014.275