Dual-phase virtual metrology scheme

Fan Tien Cheng, Hsien Cheng Huang, Chi An Kao

Research output: Contribution to journalArticlepeer-review

69 Citations (Scopus)


This paper proposes a dual-phase virtual metrology scheme. To consider both promptness and accuracy, this scheme generates dual-phase virtual metrology (VM) values. Phase I emphasizes promptness, that is to immediately calculate and output the Phase-I VM value (denoted ) of a workpiece (wafer or glass) once the entire process data of the workpiece are completely collected. Phase II improves accuracy, that is not to recalculate and output the Phase-II VM values (denoted) of all the workpieces in the cassette (also called FOUP in the semiconductor industry) until an actual metrology value (required for tuning or retraining purposes) of a workpiece in the same cassette is collected. Also, in this scheme, the accompanying reliance index (RI) and global similarity index (GSI) of each and are also generated. The RI and GSI are applied to gauge the degree of reliance. If the reliance level of a VM value is lower than the threshold, this VM value may not be adopted. An illustrative example involving fifth-generation thin-film transistor liquid crystal display (TFT-LCD) chemical-vapor deposition equipment is presented. Experimental results demonstrate that the proposed scheme is applicable to the wafer-to-wafer or glass-to-glass advanced process control for semiconductor or TFT-LCD factories.

Original languageEnglish
Article number4369327
Pages (from-to)566-571
Number of pages6
JournalIEEE Transactions on Semiconductor Manufacturing
Issue number4
Publication statusPublished - 2007 Nov

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Industrial and Manufacturing Engineering
  • Electrical and Electronic Engineering


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