Dynamic SIMD re-convergence with paired-path comparison

Yun Chi Huang, Kuan Chieh Hsu, Wan Shan Hsieh, Chen Chieh Wang, Chia Han Lu, Chung Ho Chen

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

SIMD divergence is one of the critical factors that decrease the hardware utilization in contemporary GPGPUs (General Purpose Graphic Processor Unit). Both the reconvergence scheme and control flow detection have to be well considered. In the emerging HSA (Heterogeneous System Architecture) platform, we develop an effective dynamic stack-based re-convergence scheme that can be implemented without the insertion of re-convergence instructions generated by the finalizer. The stack keeps track of the minimal necessary information of the taken and non-taken paths; the additional end-of-branch instruction insertion is no longer required under our design. Using the scheme we propose, the divergent warp dynamically re-converges at opportunistic re-convergence points. The activity factor improves for 13.36% on average from opportunistic early re-convergence in the unstructured control flow. Our design has eased the development of a finalizer that no longer needs to reason about the reconvergence point after a branch divergence, especially for unstructured control flow.

Original languageEnglish
Title of host publicationISCAS 2016 - IEEE International Symposium on Circuits and Systems
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages233-236
Number of pages4
ISBN (Electronic)9781479953400
DOIs
Publication statusPublished - 2016 Jul 29
Event2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016 - Montreal, Canada
Duration: 2016 May 222016 May 25

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2016-July
ISSN (Print)0271-4310

Other

Other2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016
CountryCanada
CityMontreal
Period16-05-2216-05-25

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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