| Original language | English |
|---|---|
| Title of host publication | 10th VLSI Design/CAD Symposium |
| Place of Publication | Nantou |
| Pages | 203-206 |
| Publication status | Published - 1999 Aug |
Economic analysis of built-in self-test for logic and memory cores
J.-M. Lu , Cheng-Wen Wu
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution