Effect of gate voltage on hot-carrier-induced on-resistance degradation in high-voltage n-type lateral diffused metal-oxide-semiconductor transistors

The phenomenon and mechanism of hot-carrier-induced on-resistance (R _on) degradation for the n-type lateral diffused metal-oxide- semiconductor (MOS) transistors stressed under various gate voltages (V _g) are investigated. R_on degradation of the device is found to be attributed to the interface state (N_it) generation in the N^- drift region. Moreover, A_on degradation is almost identical for the devices stressed under medium V_g and high V _g, despite the fact that bulk current of the device is much greater at high V_g bias. Such an anomalous R_on degradation is suggested to be the result of two combined factors: the magnitude of impact ionization rate and N_it generation efficiency.