Abstract
The effects of SnS buffer layers on the interfacial morphology, electrical model, and photovoltaic properties of solution-prepared CZTS devices were examined. Two SnS buffer layers were prepared and compared. The CZTS device that was fabricated on the as-coated SnS had many interfacial voids. By contrast, the annealed SnS layer markedly improved the CZTS quality by eliminating the voids at the CZTS-MoS2 interface. An additional capacitance-resistance circuit in parallel that was responsible for the interfacial defects was required to fit the admittance spectrum of the CZTS device prepared on the as-coated SnS. The efficiency of the CZTS solar cell prepared on the annealed SnS was as high as 8.8%, open-circuit voltage was 570 mV, short-circuit current was 24.08 mA/cm2, and fill factor was 64.5%. The open-circuit voltages and fill factor increased 43% and 72%, respectively, when the interlayer changed from the as-coated SnS to the annealed SnS.
| Original language | English |
|---|---|
| Pages (from-to) | 147-151 |
| Number of pages | 5 |
| Journal | Chalcogenide Letters |
| Volume | 14 |
| Issue number | 4 |
| Publication status | Published - 2017 Apr 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Chemistry(all)
- Physics and Astronomy(all)
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Effect of SnS buffer layer on solution process prepared Cu2ZnSnS4 solar cells. / Wu, S. H.; Guan, Q. Z.; Huang, K. T.; Shih, Chuan-Feng; Wang, Y. Y.
In: Chalcogenide Letters, Vol. 14, No. 4, 01.04.2017, p. 147-151.Research output: Contribution to journal › Article
TY - JOUR
T1 - Effect of SnS buffer layer on solution process prepared Cu2ZnSnS4 solar cells
AU - Wu, S. H.
AU - Guan, Q. Z.
AU - Huang, K. T.
AU - Shih, Chuan-Feng
AU - Wang, Y. Y.
PY - 2017/4/1
Y1 - 2017/4/1
N2 - The effects of SnS buffer layers on the interfacial morphology, electrical model, and photovoltaic properties of solution-prepared CZTS devices were examined. Two SnS buffer layers were prepared and compared. The CZTS device that was fabricated on the as-coated SnS had many interfacial voids. By contrast, the annealed SnS layer markedly improved the CZTS quality by eliminating the voids at the CZTS-MoS2 interface. An additional capacitance-resistance circuit in parallel that was responsible for the interfacial defects was required to fit the admittance spectrum of the CZTS device prepared on the as-coated SnS. The efficiency of the CZTS solar cell prepared on the annealed SnS was as high as 8.8%, open-circuit voltage was 570 mV, short-circuit current was 24.08 mA/cm2, and fill factor was 64.5%. The open-circuit voltages and fill factor increased 43% and 72%, respectively, when the interlayer changed from the as-coated SnS to the annealed SnS.
AB - The effects of SnS buffer layers on the interfacial morphology, electrical model, and photovoltaic properties of solution-prepared CZTS devices were examined. Two SnS buffer layers were prepared and compared. The CZTS device that was fabricated on the as-coated SnS had many interfacial voids. By contrast, the annealed SnS layer markedly improved the CZTS quality by eliminating the voids at the CZTS-MoS2 interface. An additional capacitance-resistance circuit in parallel that was responsible for the interfacial defects was required to fit the admittance spectrum of the CZTS device prepared on the as-coated SnS. The efficiency of the CZTS solar cell prepared on the annealed SnS was as high as 8.8%, open-circuit voltage was 570 mV, short-circuit current was 24.08 mA/cm2, and fill factor was 64.5%. The open-circuit voltages and fill factor increased 43% and 72%, respectively, when the interlayer changed from the as-coated SnS to the annealed SnS.
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M3 - Article
VL - 14
SP - 147
EP - 151
JO - Chalcogenide Letters
JF - Chalcogenide Letters
SN - 1584-8663
IS - 4
ER -