Effects of drift-region design on the reliability of integrated high-voltage LDMOS transistors

Jone F. Chen, Shiang Yu Chen, Kuen Shiuan Tian, Kuo Ming Wu, Yan Kuin Su, C. M. Liu, S. L. Hsu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)

Abstract

Effects of drift-region design on the hot-carrier reliability of n-channel integrated high-voltage lateral diffused MOS (LDMOS) transistors are investigated. LDMOS devices with various dosages of n-type drain drift (NDD) implant and various drift-region lengths (Ld) are studied. Results show that higher NDD dosage can reduce hot-carrier induced on-resistance (R on) degradation. The shift in damage location is suggested to be the main cause. In addition, longer Ld can reduce Ron degradation significantly because of less lateral electric field. Our analysis indicates that higher NDD dosage and longer Ld are effective for improving the device lifetime of the LDMOS transistors.

Original languageEnglish
Title of host publicationProceedings 2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT
Pages121-124
Number of pages4
DOIs
Publication statusPublished - 2007 Dec 1
Event2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT - Austin, TX, United States
Duration: 2007 May 302007 Jun 1

Publication series

NameProceedings 2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

Other

Other2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT
CountryUnited States
CityAustin, TX
Period07-05-3007-06-01

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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