Effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications

Kong Beng Thei; Hung Ming Chuang; Sheng Fu Tsai; Chun Tsen Lu; Xin Da Liao; Kuan Ming Lee; Wen Chau Liu

doi:10.1006/spmi.2002.1048

Effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications

Kong Beng Thei, Hung Ming Chuang, Sheng Fu Tsai, Chun Tsen Lu, Xin Da Liao, Kuan Ming Lee, Wen Chau Liu

Research output: Contribution to journal › Article › peer-review

10 Citations (Scopus)

Abstract

The effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications are studied. Under a fixed square number, the peak current density (J_peak) is increased with decreasing the polysilicon resistor width W. The time-to-fail value of the polysilicon resistor is decreased with increasing the electrical and temperature stress. A simple empirical formula is proposed in this study to predict the maximum current density (J_max) and lifetime of polysilicon resistors. Under a fixed current density (1.0 × 10⁶ A cm^-2), the activation energies (E_a) for n⁺ and p⁺ polysilicon resistors at different temperatures are 0.67 and 0.48 eV, respectively. In addition, at a fixed temperature of 473 K, the current factors for n⁺ and p⁺ polysilicon resistors are 1.57 × 10^-5 and 1.30 × 10^-5 cm²/A, respectively, under different current densities. Therefore, these precise reliability performances offer promise for ULSI design and fabrication.

Original language	English
Pages (from-to)	289-296
Number of pages	8
Journal	Superlattices and Microstructures
Volume	31
Issue number	6
DOIs	https://doi.org/10.1006/spmi.2002.1048
Publication status	Published - 2002 Jun

All Science Journal Classification (ASJC) codes

General Materials Science
Condensed Matter Physics
Electrical and Electronic Engineering

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title = "Effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications",

abstract = "The effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications are studied. Under a fixed square number, the peak current density (Jpeak) is increased with decreasing the polysilicon resistor width W. The time-to-fail value of the polysilicon resistor is decreased with increasing the electrical and temperature stress. A simple empirical formula is proposed in this study to predict the maximum current density (Jmax) and lifetime of polysilicon resistors. Under a fixed current density (1.0 × 106 A cm-2), the activation energies (Ea) for n+ and p+ polysilicon resistors at different temperatures are 0.67 and 0.48 eV, respectively. In addition, at a fixed temperature of 473 K, the current factors for n+ and p+ polysilicon resistors are 1.57 × 10-5 and 1.30 × 10-5 cm2/A, respectively, under different current densities. Therefore, these precise reliability performances offer promise for ULSI design and fabrication.",

author = "Thei, {Kong Beng} and Chuang, {Hung Ming} and Tsai, {Sheng Fu} and Lu, {Chun Tsen} and Liao, {Xin Da} and Lee, {Kuan Ming} and Liu, {Wen Chau}",

note = "Funding Information: Acknowledgement—Part of this study was supported by the National Science Council of the Republic of China under contract No. NSC. 90-2215-E-006-021.",

year = "2002",

month = jun,

doi = "10.1006/spmi.2002.1048",

language = "English",

volume = "31",

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journal = "Superlattices and Microstructures",

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T1 - Effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications

AU - Thei, Kong Beng

AU - Chuang, Hung Ming

AU - Tsai, Sheng Fu

AU - Lu, Chun Tsen

AU - Liao, Xin Da

AU - Lee, Kuan Ming

AU - Liu, Wen Chau

N1 - Funding Information: Acknowledgement—Part of this study was supported by the National Science Council of the Republic of China under contract No. NSC. 90-2215-E-006-021.

PY - 2002/6

Y1 - 2002/6

N2 - The effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications are studied. Under a fixed square number, the peak current density (Jpeak) is increased with decreasing the polysilicon resistor width W. The time-to-fail value of the polysilicon resistor is decreased with increasing the electrical and temperature stress. A simple empirical formula is proposed in this study to predict the maximum current density (Jmax) and lifetime of polysilicon resistors. Under a fixed current density (1.0 × 106 A cm-2), the activation energies (Ea) for n+ and p+ polysilicon resistors at different temperatures are 0.67 and 0.48 eV, respectively. In addition, at a fixed temperature of 473 K, the current factors for n+ and p+ polysilicon resistors are 1.57 × 10-5 and 1.30 × 10-5 cm2/A, respectively, under different current densities. Therefore, these precise reliability performances offer promise for ULSI design and fabrication.

AB - The effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications are studied. Under a fixed square number, the peak current density (Jpeak) is increased with decreasing the polysilicon resistor width W. The time-to-fail value of the polysilicon resistor is decreased with increasing the electrical and temperature stress. A simple empirical formula is proposed in this study to predict the maximum current density (Jmax) and lifetime of polysilicon resistors. Under a fixed current density (1.0 × 106 A cm-2), the activation energies (Ea) for n+ and p+ polysilicon resistors at different temperatures are 0.67 and 0.48 eV, respectively. In addition, at a fixed temperature of 473 K, the current factors for n+ and p+ polysilicon resistors are 1.57 × 10-5 and 1.30 × 10-5 cm2/A, respectively, under different current densities. Therefore, these precise reliability performances offer promise for ULSI design and fabrication.

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Effects of electrical and temperature stress on polysilicon resistors for CMOS technology applications

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