Effects of gate bias on hot-carrier reliability in drain extended metal-oxide-semiconductor transistors

K. M. Wu, J. F. Chen, Y. K. Su, J. R. Lee, K. W. Lin, J. R. Shih, S. L. Hsu

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21 Citations (Scopus)

Abstract

The effect of gate voltage on hot-carrier induced degradation in drain extended high-voltage metal-oxide-semiconductor (MOS) transistors with thick gate oxide (100 nm) structure is presented. Different from the conventional low-voltage n -type MOS transistors, under a fixed drain voltage, devices stressed at a higher Vgs result in a greater maximum transconductance and on-resistance degradation. Under higher Vgs, the increase in channel hot-carrier injection is responsible for the greater Gm,max degradation. On the other hand, Kirk effect induced increase in drain avalanche hot carriers near the drain as well as higher electric field in the channel is responsible for the greater Ron degradation.

Original languageEnglish
Article number183522
JournalApplied Physics Letters
Volume89
Issue number18
DOIs
Publication statusPublished - 2006

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

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