Efficient architecture for Reed-Solomon decoder

Yung Kuei Lu; Ming-Der Shieh

doi:10.1109/VLSI-DAT.2012.6212603

Efficient architecture for Reed-Solomon decoder

Yung Kuei Lu, Ming-Der Shieh

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

An efficient Reed-Solomon (RS) decoder design based on the reformulated inversionless Berlekamp-Massey (RiBM) algorithm is presented in this paper. Applying the developed control scheme and the simplified boundary cell, the resulting design can significantly reduce the hardware complexity and have a high throughput rate. Compared with the related works, the proposed design has the advantage of area-time complexity. With TSMC 0.18m process, the simulation results reveal that the developed RS(255,239) decoder can operate up to 425MHz and achieve a throughput rate of 3.4Gbps with a total gate count of 12,668.

Original language	English
Title of host publication	2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers
DOIs	https://doi.org/10.1109/VLSI-DAT.2012.6212603
Publication status	Published - 2012 Jul 25
Event	2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Hsinchu, Taiwan Duration: 2012 Apr 23 → 2012 Apr 25

Publication series

Name	2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers

Other

Other	2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012
Country	Taiwan
City	Hsinchu
Period	12-04-23 → 12-04-25

All Science Journal Classification (ASJC) codes

Hardware and Architecture

Access to Document

10.1109/VLSI-DAT.2012.6212603

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Lu, Y. K., & Shieh, M-D. (2012). Efficient architecture for Reed-Solomon decoder. In 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers [6212603] (2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers). https://doi.org/10.1109/VLSI-DAT.2012.6212603

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title = "Efficient architecture for Reed-Solomon decoder",

abstract = "An efficient Reed-Solomon (RS) decoder design based on the reformulated inversionless Berlekamp-Massey (RiBM) algorithm is presented in this paper. Applying the developed control scheme and the simplified boundary cell, the resulting design can significantly reduce the hardware complexity and have a high throughput rate. Compared with the related works, the proposed design has the advantage of area-time complexity. With TSMC 0.18m process, the simulation results reveal that the developed RS(255,239) decoder can operate up to 425MHz and achieve a throughput rate of 3.4Gbps with a total gate count of 12,668.",

author = "Lu, {Yung Kuei} and Ming-Der Shieh",

year = "2012",

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doi = "10.1109/VLSI-DAT.2012.6212603",

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booktitle = "2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers",

note = "2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 ; Conference date: 23-04-2012 Through 25-04-2012",

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Lu, YK & Shieh, M-D 2012, Efficient architecture for Reed-Solomon decoder. in 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers., 6212603, 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers, 2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012, Hsinchu, Taiwan, 12-04-23. https://doi.org/10.1109/VLSI-DAT.2012.6212603

Efficient architecture for Reed-Solomon decoder. / Lu, Yung Kuei; Shieh, Ming-Der.

2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers. 2012. 6212603 (2012 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2012 - Proceedings of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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