Efficient protocol converter generation for system integration

Der Wei Yang, Ming Der Shieh, Wen Hsuen Kuo, Jonas Wang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Integrate intellectual properties (IP's) designed for different protocols is always a troublesome task for system integrators. In this paper, we explore efficient methods to generate protocol converters automatically under the consideration of system performance. For the frequency/phase mismatch, we proposed a modified asynchronous FIFO together with our protocol converter. The generated results are verified in Synopsis Verification IP (VIP) environment. The performance and cost of the resulted converter are as efficient as the manual one, ARM Prime Cell.

Original languageEnglish
Title of host publicationProceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages903-906
Number of pages4
DOIs
Publication statusPublished - 2010 Dec 1
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
Duration: 2010 Dec 62010 Dec 9

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

Other2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
CountryMalaysia
CityKuala Lumpur
Period10-12-0610-12-09

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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