Efficient scissoring scheme for scanline-based rendering of 2D vector graphics

Wen Ching Lin, Jheng Hao Ye, Der Wei Yang, Si Yu Huang, Ming-Der Shieh, Jonas Wang

Research output: Contribution to conferencePaper

1 Citation (Scopus)

Abstract

This work presents a look-up table-based (LUT-based) algorithm for scanline-based rendering of OpenVG. The proposed method can deal with arbitrary number of scissoring rectangles. The rasterization and scissoring in the proposed architecture can be performed concurrently to reduce rendering time. The scanline-size buffers used as scissoring LUTs result in low area overhead. Moreover, a linked list structure of scissoring rectangles is proposed in order that only the scissoring rectangles interacted with the processing scanline are accessed to increase bus efficiency and reduce power consumption. Implementation results based on TSMC 0.13-μm CMOS technology show that the proposed rasterization design with LUT-based scissoring can operate at 200 MHz with 77K gate counts. The proposed design can render 16.8 tiger images with 392×483 resolution per second assuming ideal bus latency. Compared to existing works, the proposed design achieves a smaller area and more functionality for higher display resolution with comparable throughput.

Original languageEnglish
Pages766-769
Number of pages4
DOIs
Publication statusPublished - 2012 Sep 28
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: 2012 May 202012 May 23

Other

Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
CountryKorea, Republic of
CitySeoul
Period12-05-2012-05-23

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Electric power utilization
Display devices
Throughput
Processing
Rasterization

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Lin, W. C., Ye, J. H., Yang, D. W., Huang, S. Y., Shieh, M-D., & Wang, J. (2012). Efficient scissoring scheme for scanline-based rendering of 2D vector graphics. 766-769. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of. https://doi.org/10.1109/ISCAS.2012.6272150
Lin, Wen Ching ; Ye, Jheng Hao ; Yang, Der Wei ; Huang, Si Yu ; Shieh, Ming-Der ; Wang, Jonas. / Efficient scissoring scheme for scanline-based rendering of 2D vector graphics. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of.4 p.
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Lin, WC, Ye, JH, Yang, DW, Huang, SY, Shieh, M-D & Wang, J 2012, 'Efficient scissoring scheme for scanline-based rendering of 2D vector graphics', Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of, 12-05-20 - 12-05-23 pp. 766-769. https://doi.org/10.1109/ISCAS.2012.6272150

Efficient scissoring scheme for scanline-based rendering of 2D vector graphics. / Lin, Wen Ching; Ye, Jheng Hao; Yang, Der Wei; Huang, Si Yu; Shieh, Ming-Der; Wang, Jonas.

2012. 766-769 Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of.

Research output: Contribution to conferencePaper

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Lin WC, Ye JH, Yang DW, Huang SY, Shieh M-D, Wang J. Efficient scissoring scheme for scanline-based rendering of 2D vector graphics. 2012. Paper presented at 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of. https://doi.org/10.1109/ISCAS.2012.6272150