Efficient thread architecture for a distributed shared memory on symmetric multiprocessor clusters

Jyh Biau Chang, Y. J. Tsai, C. K. Shieh, P. C. Chung

Research output: Contribution to conferencePaperpeer-review

3 Citations (Scopus)

Abstract

The purpose of this paper is to demonstrate an efficient thread architecture for a distributed shared memory (DSM) system on symmetric multiprocessor (SMP) clusters. For DSM systems on SMP, how to utilize the processors efficiently without wasting available computational power is a major issue. In this paper, we discuss three approaches that use the process, the kernel-level thread, and the user-level thread to map application threads onto execution entities respectively. Considering the advantages and disadvantages of each method, we construct our thread package by combining both the user-level thread and the kernel-level thread. User-level threads correspond to application threads and kernel-level threads schedule these user-level threads across multiple processors. Threads are light-weighted and can be migrated in our thread package. With this thread architecture, our DSM system performs well in elementary experiments.

Original languageEnglish
Pages816-823
Number of pages8
Publication statusPublished - 1998
EventProceedings of the 1998 International Conference on Parallel and Distributed Systems, ICPADS - Tainan, China
Duration: 1998 Dec 141998 Dec 16

Other

OtherProceedings of the 1998 International Conference on Parallel and Distributed Systems, ICPADS
CityTainan, China
Period98-12-1498-12-16

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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