Efficient VLSI Architecture for Edge-Oriented Demosaicking

Chih Yuan Lien, Fu Jhong Yang, Pei Yin Chen, Yi Wen Fang

Research output: Contribution to journalArticlepeer-review

8 Citations (Scopus)


Color filter array interpolation, also known as demosaicking and 'debayering,' is a crucial process for image reconstruction in digital still cameras. This paper presents an edge-oriented demosaicking method and an efficient very-large-scale integration (VLSI) architecture for color interpolation. The design uses simple operations (addition, subtraction, shift, and comparator) and nearest neighboring pixels to catch the color difference and edges. The required line buffering of the proposed design is four lines; therefore, its hardware cost is low. Our extensive experiments revealed that the proposed technique preserved edge features and exhibited excellent quantitative evaluation and visual quality performances. Compared with the previous VLSI implementations, the proposed design achieved superior image qualities. The synthesis results revealed that by using Taiwan Semiconductor Manufacturing Company 0.18- μ m technology, the proposed design yields a processing rate of approximately 200M samples per second.

Original languageEnglish
Article number7896513
Pages (from-to)2038-2047
Number of pages10
JournalIEEE Transactions on Circuits and Systems for Video Technology
Issue number8
Publication statusPublished - 2018 Aug

All Science Journal Classification (ASJC) codes

  • Media Technology
  • Electrical and Electronic Engineering


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