Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

J. H. Tsai; W. Ch Liu; D. F. Guo; Y. Ch Kang; Sh Y. Chiu; W. Sh Lour

doi:10.1134/s1063782608030196

Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

J. H. Tsai, W. Ch Liu, D. F. Guo, Y. Ch Kang, Sh Y. Chiu, W. Sh Lour

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p ⁺-InGaAs emitter layer between p-InP confinement and n ⁺-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

Original language	English
Pages (from-to)	346-349
Number of pages	4
Journal	Semiconductors
Volume	42
Issue number	3
DOIs	https://doi.org/10.1134/s1063782608030196
Publication status	Published - 2008 Mar

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Condensed Matter Physics

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title = "Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor",

abstract = "The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p +-InGaAs emitter layer between p-InP confinement and n +-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.",

author = "Tsai, {J. H.} and Liu, {W. Ch} and Guo, {D. F.} and Kang, {Y. Ch} and Chiu, {Sh Y.} and Lour, {W. Sh}",

note = "Funding Information: This study was supported by the National Science Council of the Republic of China under Contract NSC 95-2221-E-017-013.",

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doi = "10.1134/s1063782608030196",

language = "English",

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TY - JOUR

T1 - Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

AU - Tsai, J. H.

AU - Liu, W. Ch

AU - Guo, D. F.

AU - Kang, Y. Ch

AU - Chiu, Sh Y.

AU - Lour, W. Sh

N1 - Funding Information: This study was supported by the National Science Council of the Republic of China under Contract NSC 95-2221-E-017-013.

PY - 2008/3

Y1 - 2008/3

N2 - The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p +-InGaAs emitter layer between p-InP confinement and n +-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

AB - The dc performances of an InP/InGaAs pnp heterostructure-emitter bipolar transistor are investigated by theoretical analysis and experimental results. Though the valence band discontinuity at the InP/InGaAs heterojunction is relatively large, the addition of a heavily-doped as well as thin p +-InGaAs emitter layer between p-InP confinement and n +-InGaAs base layers effectively eliminates the potential spike at emitter-base junction and simultaneously lowers the emitter-collector offset voltage and increases the potential barrier for electrons. Experimentally, a high current gain of 88 and a low offset voltage of 54 mV have been achieved.

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Electrical properties of the InP/InGaAs pnp heterostructure-emitter bipolar transistor

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