Embedded march algorithm test pattern generator for memory testing

Wei Lun Wang, Kuen-Jong Lee, Jhing Fa Wang

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)


The memory cores are essential for a system-on-a-chip (SOC). To test the memory cores, in this paper we propose a generalized embedded test pattern generator for any march algorithm. Without loss of functionality of the march algorithm, we also present a systematic procedure with a short time complexity to reduce the hardware cost of the test pattern generator.

Original languageEnglish
Pages (from-to)211-214
Number of pages4
JournalInternational Symposium on VLSI Technology, Systems, and Applications, Proceedings
Publication statusPublished - 1999

All Science Journal Classification (ASJC) codes

  • Engineering(all)


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