Energy-efficient architecture for word-based Montgomery modular multiplication algorithm

Jheng Hao Ye; Tsung Wei Hung; Ming Der Shieh

doi:10.1109/VLDI-DAT.2013.6533882

Energy-efficient architecture for word-based Montgomery modular multiplication algorithm

Jheng Hao Ye, Tsung Wei Hung, Ming Der Shieh

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

5 Citations (Scopus)

Abstract

Montgomery modular multiplication is widely used in public key cryptosystems. This paper presents an energy-efficient architecture for word-based Montgomery modular multiplication algorithm. Using the proposed architecture mapping scheme in dependency graph, the switching activity of kernel can be greatly reduced. In addition, the proposed design also retains one-cycle latency between neighboring processing elements. Experimental results based on TSMC 90-nm CMOS technology show that compared to the related work, the proposed design achieves about 17% reduction in energy consumption for completing one 1024-bit Montgomery modular multiplication.

Original language	English
Title of host publication	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
DOIs	https://doi.org/10.1109/VLDI-DAT.2013.6533882
Publication status	Published - 2013 Aug 15
Event	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 - Hsinchu, Taiwan Duration: 2013 Apr 22 → 2013 Apr 24

Publication series

Name	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013

Other

Other	2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013
Country	Taiwan
City	Hsinchu
Period	13-04-22 → 13-04-24

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/VLDI-DAT.2013.6533882

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Cite this

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title = "Energy-efficient architecture for word-based Montgomery modular multiplication algorithm",

abstract = "Montgomery modular multiplication is widely used in public key cryptosystems. This paper presents an energy-efficient architecture for word-based Montgomery modular multiplication algorithm. Using the proposed architecture mapping scheme in dependency graph, the switching activity of kernel can be greatly reduced. In addition, the proposed design also retains one-cycle latency between neighboring processing elements. Experimental results based on TSMC 90-nm CMOS technology show that compared to the related work, the proposed design achieves about 17% reduction in energy consumption for completing one 1024-bit Montgomery modular multiplication.",

author = "Ye, {Jheng Hao} and Hung, {Tsung Wei} and Shieh, {Ming Der}",

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note = "2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 ; Conference date: 22-04-2013 Through 24-04-2013",

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Ye, JH, Hung, TW & Shieh, MD 2013, Energy-efficient architecture for word-based Montgomery modular multiplication algorithm. in 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013., 6533882, 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013, Hsinchu, Taiwan, 13-04-22. https://doi.org/10.1109/VLDI-DAT.2013.6533882

Energy-efficient architecture for word-based Montgomery modular multiplication algorithm. / Ye, Jheng Hao; Hung, Tsung Wei; Shieh, Ming Der.

2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013. 2013. 6533882 (2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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