Energy-efficient dual-edge-triggered level converting flip flops with symmetry in setup times and insensitivity to output parasitics

Lih Yih Chiou, Shien Chun Luo

Research output: Contribution to journalArticlepeer-review

2 Citations (Scopus)

Abstract

Level converting flip-flops (LCFFs) are crucial components for multisupply systems as interfaces between different voltage islands. The proposed energy-efficient LCFFs reduce the power consumption of clock networks with dual-edge triggering, support sleep mode of power management mechanisms with data retention, and have symmetry in setup times and insensitivity to output parasitics. With all these features, the proposed LCFFs have 19% and 38% lower power-delay product than the conventional LCFF, as demonstrated by postlayout simulation results.

Original languageEnglish
Article number4814496
Pages (from-to)1659-1663
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume17
Issue number11
DOIs
Publication statusPublished - 2009 Nov

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Energy-efficient dual-edge-triggered level converting flip flops with symmetry in setup times and insensitivity to output parasitics'. Together they form a unique fingerprint.

Cite this