TY - JOUR
T1 - Enhancing Driving Performance of a-Si:H Thin-Film Transistors with Capacitive Coupling Method for Display Applications
AU - Lin, Chih Lung
AU - Chen, Fu Hsing
AU - Chang, Jui Hung
AU - Lin, Yu Sheng
N1 - Funding Information:
1 Department of Electrical Engineering, National Cheng Kung University, Tainan 701-01, Taiwan, and also with the Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan 701-01, Taiwan 2 Department of Electrical Engineering, National Cheng Kung University, Tainan 701-01, Taiwan CORRESPONDING AUTHOR: C.-L. LIN (e-mail: [email protected]) This work was supported in part by the Advanced Optoelectronic Technology Center, National Cheng Kung University, Tainan, Taiwan, and in part by the Ministry of Science and Technology of Taiwan under Project MOST 104-2221-E-006-189-MY3 and Project MOST 106-2218-E-006-024.
Publisher Copyright:
© 2013 IEEE.
PY - 2018
Y1 - 2018
N2 - A new capacitive coupling method to enhance the driving performance of hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) in high-resolution applications is presented. The gate voltage can be enlarged by the entirely transmitted high voltage of a global direct current power source line (VDD). Established models that are based on the measured electrical characteristics of fabricated a-Si:H TFTs with different aspect ratios are used to evaluate the feasibility of this proposed method in the gate driver. The maximum voltage of the gate voltage can be increased from 37.3 V to 47.6 V when VDD is set to 20 V, improving the driving capability of the gate driver by more than 17%, based on the specifications of a 5.99 inch HD + (720 × 1440) panel at a frame rate of 120 Hz.
AB - A new capacitive coupling method to enhance the driving performance of hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) in high-resolution applications is presented. The gate voltage can be enlarged by the entirely transmitted high voltage of a global direct current power source line (VDD). Established models that are based on the measured electrical characteristics of fabricated a-Si:H TFTs with different aspect ratios are used to evaluate the feasibility of this proposed method in the gate driver. The maximum voltage of the gate voltage can be increased from 37.3 V to 47.6 V when VDD is set to 20 V, improving the driving capability of the gate driver by more than 17%, based on the specifications of a 5.99 inch HD + (720 × 1440) panel at a frame rate of 120 Hz.
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U2 - 10.1109/JEDS.2018.2856892
DO - 10.1109/JEDS.2018.2856892
M3 - Article
AN - SCOPUS:85050222924
SN - 2168-6734
VL - 6
SP - 849
EP - 855
JO - IEEE Journal of the Electron Devices Society
JF - IEEE Journal of the Electron Devices Society
M1 - 8412490
ER -