Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels

Fong Jyun Tsai; Chong Siao Ye; Yu Huang; Kuen Jong Lee; Wu Tung Cheng; Sudhakar M. Reddy; Mark Kassab; Janusz Rajski; Shi Xuan Zheng

doi:10.1109/ITC-Asia51099.2020.00034

Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels

Fong Jyun Tsai, Chong Siao Ye, Yu Huang, Kuen Jong Lee, Wu Tung Cheng, Sudhakar M. Reddy, Mark Kassab, Janusz Rajski, Shi Xuan Zheng

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

6 Citations (Scopus)

Abstract

Over the past two decades, test data compression has become a de facto technology used in large industrial designs to reduce the overall test cost. During DFT planning, it is very important to understand the impact of using different numbers of input/output channels on test coverage, test cycles, and test data volume. In this paper, an efficient method to estimate the test data volume with different input channel counts using the Embedded Deterministic Test (EDT) compression technology is proposed. The results can then be used to quickly determine the scan configuration that results in the least or near least test data volume. With this method, the total ATPG run time can be reduced by a factor of more than 10X compared to the currently used trial-and-error method.

Original language	English
Title of host publication	Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	130-135
Number of pages	6
ISBN (Electronic)	9781728189444
DOIs	https://doi.org/10.1109/ITC-Asia51099.2020.00034
Publication status	Published - 2020 Sept
Event	4th IEEE International Test Conference in Asia, ITC-Asia 2020 - Taipei, Taiwan Duration: 2020 Sept 23 → 2020 Sept 25

Publication series

Name	Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020

Conference

Conference	4th IEEE International Test Conference in Asia, ITC-Asia 2020
Country/Territory	Taiwan
City	Taipei
Period	20-09-23 → 20-09-25

All Science Journal Classification (ASJC) codes

Computer Networks and Communications
Hardware and Architecture
Information Systems and Management
Safety, Risk, Reliability and Quality

Access to Document

10.1109/ITC-Asia51099.2020.00034

Cite this

Tsai, F. J., Ye, C. S., Huang, Y., Lee, K. J., Cheng, W. T., Reddy, S. M., Kassab, M., Rajski, J., & Zheng, S. X. (2020). Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. In Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020 (pp. 130-135). Article 9226547 (Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ITC-Asia51099.2020.00034

Tsai, Fong Jyun ; Ye, Chong Siao ; Huang, Yu et al. / Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 130-135 (Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020).

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title = "Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels",

abstract = "Over the past two decades, test data compression has become a de facto technology used in large industrial designs to reduce the overall test cost. During DFT planning, it is very important to understand the impact of using different numbers of input/output channels on test coverage, test cycles, and test data volume. In this paper, an efficient method to estimate the test data volume with different input channel counts using the Embedded Deterministic Test (EDT) compression technology is proposed. The results can then be used to quickly determine the scan configuration that results in the least or near least test data volume. With this method, the total ATPG run time can be reduced by a factor of more than 10X compared to the currently used trial-and-error method.",

author = "Tsai, {Fong Jyun} and Ye, {Chong Siao} and Yu Huang and Lee, {Kuen Jong} and Cheng, {Wu Tung} and Reddy, {Sudhakar M.} and Mark Kassab and Janusz Rajski and Zheng, {Shi Xuan}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 4th IEEE International Test Conference in Asia, ITC-Asia 2020 ; Conference date: 23-09-2020 Through 25-09-2020",

year = "2020",

month = sep,

doi = "10.1109/ITC-Asia51099.2020.00034",

language = "English",

series = "Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020",

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Tsai, FJ, Ye, CS, Huang, Y, Lee, KJ, Cheng, WT, Reddy, SM, Kassab, M, Rajski, J & Zheng, SX 2020, Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. in Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020., 9226547, Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020, Institute of Electrical and Electronics Engineers Inc., pp. 130-135, 4th IEEE International Test Conference in Asia, ITC-Asia 2020, Taipei, Taiwan, 20-09-23. https://doi.org/10.1109/ITC-Asia51099.2020.00034

Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. / Tsai, Fong Jyun; Ye, Chong Siao; Huang, Yu et al.
Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 130-135 9226547 (Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Tsai, Fong Jyun

AU - Ye, Chong Siao

AU - Huang, Yu

AU - Lee, Kuen Jong

AU - Cheng, Wu Tung

AU - Reddy, Sudhakar M.

AU - Kassab, Mark

AU - Rajski, Janusz

AU - Zheng, Shi Xuan

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N2 - Over the past two decades, test data compression has become a de facto technology used in large industrial designs to reduce the overall test cost. During DFT planning, it is very important to understand the impact of using different numbers of input/output channels on test coverage, test cycles, and test data volume. In this paper, an efficient method to estimate the test data volume with different input channel counts using the Embedded Deterministic Test (EDT) compression technology is proposed. The results can then be used to quickly determine the scan configuration that results in the least or near least test data volume. With this method, the total ATPG run time can be reduced by a factor of more than 10X compared to the currently used trial-and-error method.

AB - Over the past two decades, test data compression has become a de facto technology used in large industrial designs to reduce the overall test cost. During DFT planning, it is very important to understand the impact of using different numbers of input/output channels on test coverage, test cycles, and test data volume. In this paper, an efficient method to estimate the test data volume with different input channel counts using the Embedded Deterministic Test (EDT) compression technology is proposed. The results can then be used to quickly determine the scan configuration that results in the least or near least test data volume. With this method, the total ATPG run time can be reduced by a factor of more than 10X compared to the currently used trial-and-error method.

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Tsai FJ, Ye CS, Huang Y, Lee KJ, Cheng WT, Reddy SM et al. Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels. In Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 130-135. 9226547. (Proceedings - 2020 IEEE International Test Conference in Asia, ITC-Asia 2020). doi: 10.1109/ITC-Asia51099.2020.00034

Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels

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