| Original language | English |
|---|---|
| Title of host publication | 2nd VLSI Test Technology Workshop (VTTW) |
| Place of Publication | Tainan |
| Publication status | Published - 2008 Jul |
Evaluation of Redundancy Analysis Schemes for Reparable Memories with Redundancy Constraints
Cheng-Wen Wu, C.-H. Lin, M.-S. Lee, C.-L. Su
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution