Evaluation of Redundancy Analysis Schemes for Reparable Memories with Redundancy Constraints

Cheng-Wen Wu, C.-H. Lin, M.-S. Lee, C.-L. Su

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publication2nd VLSI Test Technology Workshop (VTTW)
Place of PublicationTainan
Publication statusPublished - 2008 Jul

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