The buffering of data is a potential bottleneck to performance. In general, the buffer can be implemented either by FIFO or dual-port RAM, which are both two-port memory devices. In the Letter a classification of buffers is proposed. According to the classification, a new two-port memory device with the sequential-in-random-out feature is introduced. Simulation results show that 45% time, at most, could be saved, as compared to a FIFO buffer.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering