Evaluation of sequential-in-random-out memory device

C. Y. Chang, C. K. Shieh, T. W. Hou

Research output: Contribution to journalArticlepeer-review

Abstract

The buffering of data is a potential bottleneck to performance. In general, the buffer can be implemented either by FIFO or dual-port RAM, which are both two-port memory devices. In the Letter a classification of buffers is proposed. According to the classification, a new two-port memory device with the sequential-in-random-out feature is introduced. Simulation results show that 45% time, at most, could be saved, as compared to a FIFO buffer.

Original languageEnglish
Pages (from-to)620-621
Number of pages2
JournalElectronics Letters
Volume31
Issue number8
DOIs
Publication statusPublished - 1995 Apr 13

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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