Boolean process theory, which was proposed in 1994 by Yinghua Min, one of authors of this paper, is a theory mainly used for design and test of high-speed circuits and it can be considered as an expansion of Boolean algebra with the time field. It takes less time to calculate circuit's timing behavior using Boolean process than using SPICE, so it can be applied in large circuits, while SPICE will be too slow to use in such cases. Boolean process is studied in recent years, and it was used in path sensitization, IDDT, and other fields. BPBDD, an expansion of BDD, is also carried out, and Boolean process can be easily calculated using it. As a quick calculate method, Boolean process can be applied in IC timing study and analysis, but some craft brothers in other countries question its reality. This paper explains the physical meaning of Boolean process, and builds an experimental basis of Boolean process. The authors use 0.35 μm, 3.3 V MOSFET transistor model and HSPICE to do simulations at switch level, get results by observing the voltage waveforms in circuits, and do simulations on some example circuits in this way, and the simulation results is the same as the results calculated by Boolean process. Therefore, Boolean process is verified to be a realistic representation of logical and timing behavior of digital circuits by the experiments.
|Number of pages||5|
|Journal||Jisuanji Xuebao/Chinese Journal of Computers|
|Publication status||Published - 2000 Nov 1|
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Computer Networks and Communications
- Computer Graphics and Computer-Aided Design