Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

Chien Hung Chen, Yiming Li, Chieh Yang Chen, Yu Yu Chen, Sheng Chia Hsu, Wen Tsung Huang, Sheng-Yuan Chu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

Original languageEnglish
Title of host publication2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
Pages1168-1171
Number of pages4
DOIs
Publication statusPublished - 2013 Dec 1
Event2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 - Beijing, China
Duration: 2013 Aug 52013 Aug 8

Publication series

NameProceedings of the IEEE Conference on Nanotechnology
ISSN (Print)1944-9399
ISSN (Electronic)1944-9380

Other

Other2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
CountryChina
CityBeijing
Period13-08-0513-08-08

Fingerprint

MOS devices
Surface roughness
Silicon
Passivation
Hydrogen
roughness
Water
Electric potential
Substrates
passivity
Experiments
traps
wafers
shift
electric potential
silicon
curves
hydrogen
water

All Science Journal Classification (ASJC) codes

  • Bioengineering
  • Electrical and Electronic Engineering
  • Materials Chemistry
  • Condensed Matter Physics

Cite this

Chen, C. H., Li, Y., Chen, C. Y., Chen, Y. Y., Hsu, S. C., Huang, W. T., & Chu, S-Y. (2013). Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. In 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 (pp. 1168-1171). [6721026] (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2013.6721026
Chen, Chien Hung ; Li, Yiming ; Chen, Chieh Yang ; Chen, Yu Yu ; Hsu, Sheng Chia ; Huang, Wen Tsung ; Chu, Sheng-Yuan. / Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013. 2013. pp. 1168-1171 (Proceedings of the IEEE Conference on Nanotechnology).
@inproceedings{4f9785d943eb46e98b77196928d5e1cf,
title = "Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices",
abstract = "In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50{\%} improvement.",
author = "Chen, {Chien Hung} and Yiming Li and Chen, {Chieh Yang} and Chen, {Yu Yu} and Hsu, {Sheng Chia} and Huang, {Wen Tsung} and Sheng-Yuan Chu",
year = "2013",
month = "12",
day = "1",
doi = "10.1109/NANO.2013.6721026",
language = "English",
isbn = "9781479906758",
series = "Proceedings of the IEEE Conference on Nanotechnology",
pages = "1168--1171",
booktitle = "2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013",

}

Chen, CH, Li, Y, Chen, CY, Chen, YY, Hsu, SC, Huang, WT & Chu, S-Y 2013, Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. in 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013., 6721026, Proceedings of the IEEE Conference on Nanotechnology, pp. 1168-1171, 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013, Beijing, China, 13-08-05. https://doi.org/10.1109/NANO.2013.6721026

Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. / Chen, Chien Hung; Li, Yiming; Chen, Chieh Yang; Chen, Yu Yu; Hsu, Sheng Chia; Huang, Wen Tsung; Chu, Sheng-Yuan.

2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013. 2013. p. 1168-1171 6721026 (Proceedings of the IEEE Conference on Nanotechnology).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices

AU - Chen, Chien Hung

AU - Li, Yiming

AU - Chen, Chieh Yang

AU - Chen, Yu Yu

AU - Hsu, Sheng Chia

AU - Huang, Wen Tsung

AU - Chu, Sheng-Yuan

PY - 2013/12/1

Y1 - 2013/12/1

N2 - In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

AB - In this work, the planar HKMG MOS devices are fabricated on (100) wafer with p-substrate. To improve the samples' interface roughness between the Si/Ge film and the interface layer, three different clean treatments are considered to fabricate the MOS devices. Among processes, the experiment indicates that HF and water rinse can present hydrogen termination to bond silicon as a good passivation. The measured C-V curves and HRTEM of the fabricated samples show the interface roughness is improved significantly. The extracted shift of flat band voltage (ΔVfb) and density of interface traps (D it) have around 50% improvement.

UR - http://www.scopus.com/inward/record.url?scp=84894178919&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84894178919&partnerID=8YFLogxK

U2 - 10.1109/NANO.2013.6721026

DO - 10.1109/NANO.2013.6721026

M3 - Conference contribution

AN - SCOPUS:84894178919

SN - 9781479906758

T3 - Proceedings of the IEEE Conference on Nanotechnology

SP - 1168

EP - 1171

BT - 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013

ER -

Chen CH, Li Y, Chen CY, Chen YY, Hsu SC, Huang WT et al. Experimentally effective clean process to C-V characteristic variation reduction of HKMG MOS devices. In 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013. 2013. p. 1168-1171. 6721026. (Proceedings of the IEEE Conference on Nanotechnology). https://doi.org/10.1109/NANO.2013.6721026