Turbo coding is a powerful coding technique that can provide highly reliable data transmission at extremely low signal-to-noise ratios. Owing to the computational complexity of the employed decoding algorithm, the realization of turbo decoders usually takes a large amount of memory space and potentially long decoding delay. Therefore, an efficient memory management strategy becomes one of the key factors toward successfully implementing turbo decoders. This paper focuses on the development of general structures for efficient memory management of turbo decoders employing the sliding-window (Log-)MAP algorithm. Three different structures and the associated mathematic representations are derived to evaluate the required memory size, average decoding rate, and latency based on the speed and the number of the adopted processors. Comparative results show the dependency of the resulting performance based on a set of parameters; thus provide useful and general information on practical implementations of turbo decoders.
|Number of pages||11|
|Journal||IEICE Transactions on Communications|
|Publication status||Published - 2003 Nov|
All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Electrical and Electronic Engineering