Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain

Xin Wang, M. Huang, C. Bowen, L. Adam, S. Singh, Tz-Cheng Chiu, J. Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)

Abstract

Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.

Original languageEnglish
Title of host publication2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
Pages323-326
Number of pages4
Publication statusPublished - 2005 Dec 1
Event2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 - Tokyo, Japan
Duration: 2005 Sep 12005 Sep 3

Publication series

NameInternational Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume2005

Other

Other2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
CountryJapan
CityTokyo
Period05-09-0105-09-03

Fingerprint

Stress concentration
Transistors

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Wang, X., Huang, M., Bowen, C., Adam, L., Singh, S., Chiu, T-C., & Wu, J. (2005). Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain. In 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005 (pp. 323-326). [1562090] (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2005).
Wang, Xin ; Huang, M. ; Bowen, C. ; Adam, L. ; Singh, S. ; Chiu, Tz-Cheng ; Wu, J. / Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain. 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. 2005. pp. 323-326 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).
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title = "Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain",
abstract = "Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.",
author = "Xin Wang and M. Huang and C. Bowen and L. Adam and S. Singh and Tz-Cheng Chiu and J. Wu",
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Wang, X, Huang, M, Bowen, C, Adam, L, Singh, S, Chiu, T-C & Wu, J 2005, Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain. in 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005., 1562090, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, vol. 2005, pp. 323-326, 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005, Tokyo, Japan, 05-09-01.

Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain. / Wang, Xin; Huang, M.; Bowen, C.; Adam, L.; Singh, S.; Chiu, Tz-Cheng; Wu, J.

2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. 2005. p. 323-326 1562090 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2005).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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T1 - Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain

AU - Wang, Xin

AU - Huang, M.

AU - Bowen, C.

AU - Adam, L.

AU - Singh, S.

AU - Chiu, Tz-Cheng

AU - Wu, J.

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N2 - Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.

AB - Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.

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M3 - Conference contribution

SN - 4990276205

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BT - 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005

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Wang X, Huang M, Bowen C, Adam L, Singh S, Chiu T-C et al. Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain. In 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005. 2005. p. 323-326. 1562090. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).