TY - GEN
T1 - Exploring transistor width effect on stress-induced performance improvement in PMOSFET with SiGe source/drain
AU - Wang, Xin
AU - Huang, M.
AU - Bowen, C.
AU - Adam, L.
AU - Singh, S.
AU - Chiu, C.
AU - Wu, J.
PY - 2005
Y1 - 2005
N2 - Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.
AB - Stress distribution in the Si channel regions of SiGe source/drain PMOSFETs with various widths is studied by 3D simulations. The width dependence of performance improvement is analyzed via device simulations.
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M3 - Conference contribution
AN - SCOPUS:33845907111
SN - 4990276205
SN - 9784990276201
T3 - International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
SP - 323
EP - 326
BT - 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
T2 - 2005 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2005
Y2 - 1 September 2005 through 3 September 2005
ER -