The fabrication and characterization of very compact horizontal current bipolar transistor (HCBT) is presented. The active transistor region is processed in the sidewalls of the n-hill, which makes this structure attractive for the integration with pillar-like CMOS with minimum process additions. HCBT technology is simple with 5 lithography masks. The active n-hills are isolated by newly developed chemical-mechanical planarization (CMP) and etch back of oxide. The 〈110〉 substrate is used for HCBT fabrication utilizing 〈111〉 crystal planes as the active sidewalls. This enables the use of crystallographic dependent etchants for the minimization of the sidewall roughness and dry etching defects, as well as increases the controllability and repeatability of intrinsic transistor doping process. The active transistor regions are processed by angled ion implantation in self-aligned manner. The processed structures result in a cutoff frequency - breakdown voltage (f TBVCEO) product of 69.5 GHzV and current gain - Early voltage (βVA) of 4800 V. The high-frequency characteristics are limited by the wide extrinsic base due to the coarse lithography resolution used for fabrication. It is shown by simulations that the improvement of (f T) and maximum oscillation frequency (fmax) up to 24 and 50 GHz, respectively, can be achieved with finer lithography employed.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering