Fast deterministic test pattern generation for scan-based bist environment

Linear feedback shift registers (LFSRs) have been used to generate both pseudorandom and deterministic patterns in the scan-based built-in self-test environment in order to raise the fault coverage and reduce test cost. However, like other scan-based methods, the LFSR-based pattern generation schemes take a long test application time on feeding deterministic patterns from the LFSR into a scan chain. In this paper we derive a generalized relationship between the bits in the original scan chain and the states of the LFSR such that the bits generated by an LFSR in any future clock cycle can be pre-generated by the proposed test pattern generator. With this relationship, we can divide a scan chain into multiple sub-chains and use an LFSR-based multiple sequence generator to simultaneously generate all the subsequences required by the sub-chains. Hence, we can greatly reduce the test application time.