The NAND flash memory has been widely used in computer and consumer electronic devices. A multilevel-cell (MLC) NAND flash memory allows two or more bits to be stored per cell, improving the cell density and, hence, reducing the cost. The lower price of the MLC NAND has made it appearing in both consumer product and datacenter markets. In MLC NAND, the page read latency varies according to the page type. For read-dominated workloads, placing read-intensive data into pages with longer read latencies may result in degraded read performance. In this brief, an online method called FastRead is proposed to improve the read performance of MLC NAND-based storage. The FastRead method dynamically identifies read-intensive data and migrates them to pages with shorter read latency to improve the read performance. According to the performance results, FastRead can reduce the read response time by up to 22% (17% on average) for read-dominated workloads on a Triple-level cell NAND. In addition, FastRead does not have noticeable performance impact for write-dominated workloads, and the overhead is insignificant.
|Number of pages||5|
|Journal||IEEE Transactions on Very Large Scale Integration (VLSI) Systems|
|Publication status||Published - 2016 Sep|
All Science Journal Classification (ASJC) codes
- Hardware and Architecture
- Electrical and Electronic Engineering