Flash memory built-in self-test using march-like algorithms

Jen Chieh Yeh, Chi Feng Wu, Kuo Liang Cheng, Yung Fa Chou, Chih Tsun Huang, Cheng Wen Wu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

36 Citations (Scopus)

Abstract

Flash memories are a type of non-volatile memory based on floating-gate transistors. The use of commodity and embedded flash memories are growing rapidly as we enter the system-on-chip (SOC) era. Conventional tests for flash memories are usually ad hoc-the test procedure is developed for a specific design. We propose improved March-like algorithms (i.e., March FT) for both bit-oriented and word-oriented flash memory, to cover the disturbance faults derived from the IEEE 1005 Standard, as well as conventional faults. A noval flash memory fault simulator is used to analyze and generate the test algorithms. In addition, we present BIST designs for two industrial flash memories. The area overhead is only about 3% for a medium-sized flash memory.

Original languageEnglish
Title of host publicationProceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002
EditorsM. Renovell, S. Kajihara, S. Demidenko, I. Al-Bahadly
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages137-141
Number of pages5
ISBN (Electronic)0769514537, 9780769514536
DOIs
Publication statusPublished - 2002 Jan 1
Event1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002 - Christchurch, New Zealand
Duration: 2002 Jan 292002 Jan 31

Publication series

NameProceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002

Conference

Conference1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002
CountryNew Zealand
CityChristchurch
Period02-01-2902-01-31

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Computer Science Applications

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