Flash memory built-in self-test using march-like algorithms

Jen Chieh Yeh; Chi Feng Wu; Kuo Liang Cheng; Yung Fa Chou; Chih Tsun Huang; Cheng Wen Wu

doi:10.1109/DELTA.2002.994602

Flash memory built-in self-test using march-like algorithms

Jen Chieh Yeh, Chi Feng Wu, Kuo Liang Cheng, Yung Fa Chou, Chih Tsun Huang, Cheng Wen Wu

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

41 Citations (Scopus)

Abstract

Flash memories are a type of non-volatile memory based on floating-gate transistors. The use of commodity and embedded flash memories are growing rapidly as we enter the system-on-chip (SOC) era. Conventional tests for flash memories are usually ad hoc-the test procedure is developed for a specific design. We propose improved March-like algorithms (i.e., March FT) for both bit-oriented and word-oriented flash memory, to cover the disturbance faults derived from the IEEE 1005 Standard, as well as conventional faults. A noval flash memory fault simulator is used to analyze and generate the test algorithms. In addition, we present BIST designs for two industrial flash memories. The area overhead is only about 3% for a medium-sized flash memory.

Original language	English
Title of host publication	Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002
Editors	M. Renovell, S. Kajihara, S. Demidenko, I. Al-Bahadly
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	137-141
Number of pages	5
ISBN (Electronic)	0769514537, 9780769514536
DOIs	https://doi.org/10.1109/DELTA.2002.994602
Publication status	Published - 2002 Jan 1
Event	1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002 - Christchurch, New Zealand Duration: 2002 Jan 29 → 2002 Jan 31

Publication series

Name	Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002

Conference

Conference	1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002
Country/Territory	New Zealand
City	Christchurch
Period	02-01-29 → 02-01-31

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Computer Science Applications

Access to Document

10.1109/DELTA.2002.994602

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Yeh, J. C., Wu, C. F., Cheng, K. L., Chou, Y. F., Huang, C. T., & Wu, C. W. (2002). Flash memory built-in self-test using march-like algorithms. In M. Renovell, S. Kajihara, S. Demidenko, & I. Al-Bahadly (Eds.), Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002 (pp. 137-141). Article 994602 (Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/DELTA.2002.994602

Yeh, Jen Chieh ; Wu, Chi Feng ; Cheng, Kuo Liang et al. / Flash memory built-in self-test using march-like algorithms. Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002. editor / M. Renovell ; S. Kajihara ; S. Demidenko ; I. Al-Bahadly. Institute of Electrical and Electronics Engineers Inc., 2002. pp. 137-141 (Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002).

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abstract = "Flash memories are a type of non-volatile memory based on floating-gate transistors. The use of commodity and embedded flash memories are growing rapidly as we enter the system-on-chip (SOC) era. Conventional tests for flash memories are usually ad hoc-the test procedure is developed for a specific design. We propose improved March-like algorithms (i.e., March FT) for both bit-oriented and word-oriented flash memory, to cover the disturbance faults derived from the IEEE 1005 Standard, as well as conventional faults. A noval flash memory fault simulator is used to analyze and generate the test algorithms. In addition, we present BIST designs for two industrial flash memories. The area overhead is only about 3% for a medium-sized flash memory.",

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Yeh, JC, Wu, CF, Cheng, KL, Chou, YF, Huang, CT & Wu, CW 2002, Flash memory built-in self-test using march-like algorithms. in M Renovell, S Kajihara, S Demidenko & I Al-Bahadly (eds), Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002., 994602, Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002, Institute of Electrical and Electronics Engineers Inc., pp. 137-141, 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002, Christchurch, New Zealand, 02-01-29. https://doi.org/10.1109/DELTA.2002.994602

Flash memory built-in self-test using march-like algorithms. / Yeh, Jen Chieh; Wu, Chi Feng; Cheng, Kuo Liang et al.
Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002. ed. / M. Renovell; S. Kajihara; S. Demidenko; I. Al-Bahadly. Institute of Electrical and Electronics Engineers Inc., 2002. p. 137-141 994602 (Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AB - Flash memories are a type of non-volatile memory based on floating-gate transistors. The use of commodity and embedded flash memories are growing rapidly as we enter the system-on-chip (SOC) era. Conventional tests for flash memories are usually ad hoc-the test procedure is developed for a specific design. We propose improved March-like algorithms (i.e., March FT) for both bit-oriented and word-oriented flash memory, to cover the disturbance faults derived from the IEEE 1005 Standard, as well as conventional faults. A noval flash memory fault simulator is used to analyze and generate the test algorithms. In addition, we present BIST designs for two industrial flash memories. The area overhead is only about 3% for a medium-sized flash memory.

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Yeh JC, Wu CF, Cheng KL, Chou YF, Huang CT, Wu CW. Flash memory built-in self-test using march-like algorithms. In Renovell M, Kajihara S, Demidenko S, Al-Bahadly I, editors, Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002. Institute of Electrical and Electronics Engineers Inc. 2002. p. 137-141. 994602. (Proceedings - 1st IEEE International Workshop on Electronic Design, Test and Applications, DELTA 2002). doi: 10.1109/DELTA.2002.994602

Flash memory built-in self-test using march-like algorithms

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