Full memory encryption with magnetoelectric in-memory computing

Albert Lee; Kang L. Wang

doi:10.1109/VLSI-TSA.2019.8804703

Full memory encryption with magnetoelectric in-memory computing

Albert Lee, Kang L. Wang

College of Electrical Engineering and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Citations (Scopus)

Abstract

We propose an in-memory computing architecture based on the magneto-electric random access memory (MeRAM). The unique precessional magnetism of MeRAM is utilized to carry out XOR encryption of the device state with a key, allowing for encryption without readout of the device state, thus saving a significant energy and delay over computing-in-memory architectures. Furthermore, parallel encryption of memory blocks provides additional orders of improvement in encryption time. We simulate the proposed encryption scheme using a 28nm CMOS process and a macrospin LLG MTJ model, then evaluate the energy and latency of full-memory encryption on a 512 \mathrm{x} 512 array. The proposed scheme achieves up to 7.4x and 1024x in energy and latency over computing in memory architectures, respectively.

Original language	English
Title of host publication	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728109428
DOIs	https://doi.org/10.1109/VLSI-TSA.2019.8804703
Publication status	Published - 2019 Apr
Event	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 - Hsinchu, Taiwan Duration: 2019 Apr 22 → 2019 Apr 25

Publication series

Name	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

Conference

Conference	2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019
Country/Territory	Taiwan
City	Hsinchu
Period	19-04-22 → 19-04-25

All Science Journal Classification (ASJC) codes

Hardware and Architecture
Electrical and Electronic Engineering
Electronic, Optical and Magnetic Materials

Access to Document

10.1109/VLSI-TSA.2019.8804703

Cite this

Lee, A., & Wang, K. L. (2019). Full memory encryption with magnetoelectric in-memory computing. In 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 Article 8804703 (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA.2019.8804703

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title = "Full memory encryption with magnetoelectric in-memory computing",

abstract = "We propose an in-memory computing architecture based on the magneto-electric random access memory (MeRAM). The unique precessional magnetism of MeRAM is utilized to carry out XOR encryption of the device state with a key, allowing for encryption without readout of the device state, thus saving a significant energy and delay over computing-in-memory architectures. Furthermore, parallel encryption of memory blocks provides additional orders of improvement in encryption time. We simulate the proposed encryption scheme using a 28nm CMOS process and a macrospin LLG MTJ model, then evaluate the energy and latency of full-memory encryption on a 512 \mathrm{x} 512 array. The proposed scheme achieves up to 7.4x and 1024x in energy and latency over computing in memory architectures, respectively.",

author = "Albert Lee and Wang, {Kang L.}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019 ; Conference date: 22-04-2019 Through 25-04-2019",

year = "2019",

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doi = "10.1109/VLSI-TSA.2019.8804703",

language = "English",

series = "2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019",

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Lee, A & Wang, KL 2019, Full memory encryption with magnetoelectric in-memory computing. in 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019., 8804703, 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019, Institute of Electrical and Electronics Engineers Inc., 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019, Hsinchu, Taiwan, 19-04-22. https://doi.org/10.1109/VLSI-TSA.2019.8804703

Full memory encryption with magnetoelectric in-memory computing. / Lee, Albert; Wang, Kang L.
2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019. Institute of Electrical and Electronics Engineers Inc., 2019. 8804703 (2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Lee, Albert

AU - Wang, Kang L.

PY - 2019/4

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N2 - We propose an in-memory computing architecture based on the magneto-electric random access memory (MeRAM). The unique precessional magnetism of MeRAM is utilized to carry out XOR encryption of the device state with a key, allowing for encryption without readout of the device state, thus saving a significant energy and delay over computing-in-memory architectures. Furthermore, parallel encryption of memory blocks provides additional orders of improvement in encryption time. We simulate the proposed encryption scheme using a 28nm CMOS process and a macrospin LLG MTJ model, then evaluate the energy and latency of full-memory encryption on a 512 \mathrm{x} 512 array. The proposed scheme achieves up to 7.4x and 1024x in energy and latency over computing in memory architectures, respectively.

AB - We propose an in-memory computing architecture based on the magneto-electric random access memory (MeRAM). The unique precessional magnetism of MeRAM is utilized to carry out XOR encryption of the device state with a key, allowing for encryption without readout of the device state, thus saving a significant energy and delay over computing-in-memory architectures. Furthermore, parallel encryption of memory blocks provides additional orders of improvement in encryption time. We simulate the proposed encryption scheme using a 28nm CMOS process and a macrospin LLG MTJ model, then evaluate the energy and latency of full-memory encryption on a 512 \mathrm{x} 512 array. The proposed scheme achieves up to 7.4x and 1024x in energy and latency over computing in memory architectures, respectively.

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M3 - Conference contribution

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BT - 2019 International Symposium on VLSI Technology, Systems and Application, VLSI-TSA 2019

PB - Institute of Electrical and Electronics Engineers Inc.

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Y2 - 22 April 2019 through 25 April 2019

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Full memory encryption with magnetoelectric in-memory computing

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