Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator

Chun Hsun Wu, Le-Ren Chang-Chien

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Low-Dropout voltage regulators (LDOs) have been widely used in the mobile electronic devices. Due to the purpose of energy saving, LDOs are preferred to perform fast transient response with low quiescent current as they operate at low supply voltage condition. This paper proposes a full quiescent current boosting circuit (FQCB) that is augmented to the LDO for further accelerating the response during the load transient. Compared to the other dynamic bias approach, the proposed technique raises the quiescent current to the maximum quantity during the load transient for maximizing the dynamic bias effect. The designed LDO was implemented by a 0.35μm CMOS process. Testing results show that the voltage spike is reduced by 65% compared with the LDO without the proposed circuit under the 50mA load change within 300ns. The recovery time is less than 1μs and the stability is guaranteed.

Original languageEnglish
Title of host publicationISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems
Pages2733-2736
Number of pages4
DOIs
Publication statusPublished - 2012
Event2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of
Duration: 2012 May 202012 May 23

Other

Other2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012
CountryKorea, Republic of
CitySeoul
Period12-05-2012-05-23

Fingerprint

Voltage regulators
Transient analysis
Networks (circuits)
Electric potential
Energy conservation
Recovery
Testing

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Wu, Chun Hsun ; Chang-Chien, Le-Ren. / Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator. ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. pp. 2733-2736
@inproceedings{8fa77732b2454d598ab4ef0fd3021a80,
title = "Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator",
abstract = "Low-Dropout voltage regulators (LDOs) have been widely used in the mobile electronic devices. Due to the purpose of energy saving, LDOs are preferred to perform fast transient response with low quiescent current as they operate at low supply voltage condition. This paper proposes a full quiescent current boosting circuit (FQCB) that is augmented to the LDO for further accelerating the response during the load transient. Compared to the other dynamic bias approach, the proposed technique raises the quiescent current to the maximum quantity during the load transient for maximizing the dynamic bias effect. The designed LDO was implemented by a 0.35μm CMOS process. Testing results show that the voltage spike is reduced by 65{\%} compared with the LDO without the proposed circuit under the 50mA load change within 300ns. The recovery time is less than 1μs and the stability is guaranteed.",
author = "Wu, {Chun Hsun} and Le-Ren Chang-Chien",
year = "2012",
doi = "10.1109/ISCAS.2012.6271874",
language = "English",
pages = "2733--2736",
booktitle = "ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems",

}

Wu, CH & Chang-Chien, L-R 2012, Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator. in ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems., 6271874, pp. 2733-2736, 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea, Republic of, 12-05-20. https://doi.org/10.1109/ISCAS.2012.6271874

Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator. / Wu, Chun Hsun; Chang-Chien, Le-Ren.

ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems. 2012. p. 2733-2736 6271874.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Full quiescent current enhancement technique for improving transient response on the output-capacitorless Low-Dropout regulator

AU - Wu, Chun Hsun

AU - Chang-Chien, Le-Ren

PY - 2012

Y1 - 2012

N2 - Low-Dropout voltage regulators (LDOs) have been widely used in the mobile electronic devices. Due to the purpose of energy saving, LDOs are preferred to perform fast transient response with low quiescent current as they operate at low supply voltage condition. This paper proposes a full quiescent current boosting circuit (FQCB) that is augmented to the LDO for further accelerating the response during the load transient. Compared to the other dynamic bias approach, the proposed technique raises the quiescent current to the maximum quantity during the load transient for maximizing the dynamic bias effect. The designed LDO was implemented by a 0.35μm CMOS process. Testing results show that the voltage spike is reduced by 65% compared with the LDO without the proposed circuit under the 50mA load change within 300ns. The recovery time is less than 1μs and the stability is guaranteed.

AB - Low-Dropout voltage regulators (LDOs) have been widely used in the mobile electronic devices. Due to the purpose of energy saving, LDOs are preferred to perform fast transient response with low quiescent current as they operate at low supply voltage condition. This paper proposes a full quiescent current boosting circuit (FQCB) that is augmented to the LDO for further accelerating the response during the load transient. Compared to the other dynamic bias approach, the proposed technique raises the quiescent current to the maximum quantity during the load transient for maximizing the dynamic bias effect. The designed LDO was implemented by a 0.35μm CMOS process. Testing results show that the voltage spike is reduced by 65% compared with the LDO without the proposed circuit under the 50mA load change within 300ns. The recovery time is less than 1μs and the stability is guaranteed.

UR - http://www.scopus.com/inward/record.url?scp=84866625659&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84866625659&partnerID=8YFLogxK

U2 - 10.1109/ISCAS.2012.6271874

DO - 10.1109/ISCAS.2012.6271874

M3 - Conference contribution

AN - SCOPUS:84866625659

SP - 2733

EP - 2736

BT - ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems

ER -