Gate driver circuit with fast-falling structure for high-resolution applications

Chin Hsien Tseng, Fu Hsing Chen, Po Cheng Lai, Chih-Lung Lin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This work proposes a new gate driver circuit which utilizes hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) for high-resolution panels. By using one TFT to separate the output node from the capacitor in the gate driver circuit, the driving TFT can remain high speed to pull down the output signal. Simulation results verify that the falling time reduces over 20% without enlarging the size of the driving TFT.

Original languageEnglish
Title of host publicationAM-FPD 2017 - 24th International Workshop on Active-Matrix Flatpanel Displays and Devices
Subtitle of host publicationTFT Technologies and FPD Materials, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages140-142
Number of pages3
ISBN (Electronic)9784990875336
Publication statusPublished - 2017 Aug 8
Event24th International Workshop on Active-Matrix Flatpanel Displays and Devices, AM-FPD 2017 - Kyoto, Japan
Duration: 2017 Jul 42017 Jul 7

Other

Other24th International Workshop on Active-Matrix Flatpanel Displays and Devices, AM-FPD 2017
CountryJapan
CityKyoto
Period17-07-0417-07-07

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Computational Theory and Mathematics

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