Gate-first low vt Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing

N. C. Su, C. H. Wu, M. F. Chang, J. Z. Huang, S. J. Wang, W. C. Lee, P. T. Lee, H. L. Kao, Albert Chin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (Vt) of -0.07 V and good peak hole mobility of 86 cm2/V-s at 1.5 nm equivalent-oxide thickness (EOT).

Original languageEnglish
Title of host publication66th DRC Device Research Conference Digest, DRC 2008
Pages71-72
Number of pages2
DOIs
Publication statusPublished - 2008 Dec 1
Event66th DRC Device Research Conference Digest, DRC 2008 - Santa Barbara, CA, United States
Duration: 2008 Jun 232008 Jun 25

Publication series

NameDevice Research Conference - Conference Digest, DRC
ISSN (Print)1548-3770

Other

Other66th DRC Device Research Conference Digest, DRC 2008
CountryUnited States
CitySanta Barbara, CA
Period08-06-2308-06-25

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Su, N. C., Wu, C. H., Chang, M. F., Huang, J. Z., Wang, S. J., Lee, W. C., Lee, P. T., Kao, H. L., & Chin, A. (2008). Gate-first low vt Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing. In 66th DRC Device Research Conference Digest, DRC 2008 (pp. 71-72). [4800739] (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2008.4800739