Gate-first low vt Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing

N. C. Su; C. H. Wu; M. F. Chang; J. Z. Huang; S. J. Wang; W. C. Lee; P. T. Lee; H. L. Kao; Albert Chin

doi:10.1109/DRC.2008.4800739

Gate-first low v_t Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing

N. C. Su, C. H. Wu, M. F. Chang, J. Z. Huang, S. J. Wang, W. C. Lee, P. T. Lee, H. L. Kao, Albert Chin

Institute of Microelectronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (V_t) of -0.07 V and good peak hole mobility of 86 cm²/V-s at 1.5 nm equivalent-oxide thickness (EOT).

Original language	English
Title of host publication	66th DRC Device Research Conference Digest, DRC 2008
Pages	71-72
Number of pages	2
DOIs	https://doi.org/10.1109/DRC.2008.4800739
Publication status	Published - 2008 Dec 1
Event	66th DRC Device Research Conference Digest, DRC 2008 - Santa Barbara, CA, United States Duration: 2008 Jun 23 → 2008 Jun 25

Publication series

Name	Device Research Conference - Conference Digest, DRC
ISSN (Print)	1548-3770

Other

Other	66th DRC Device Research Conference Digest, DRC 2008
Country/Territory	United States
City	Santa Barbara, CA
Period	08-06-23 → 08-06-25

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/DRC.2008.4800739

Cite this

Su, N. C., Wu, C. H., Chang, M. F., Huang, J. Z., Wang, S. J., Lee, W. C., Lee, P. T., Kao, H. L., & Chin, A. (2008). Gate-first low v_t Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing. In 66th DRC Device Research Conference Digest, DRC 2008 (pp. 71-72). Article 4800739 (Device Research Conference - Conference Digest, DRC). https://doi.org/10.1109/DRC.2008.4800739

@inproceedings{5f4a07919592412f91d7f1ef9a8f4769,

title = "Gate-first low vt Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing",

abstract = "Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (Vt) of -0.07 V and good peak hole mobility of 86 cm2/V-s at 1.5 nm equivalent-oxide thickness (EOT).",

author = "Su, {N. C.} and Wu, {C. H.} and Chang, {M. F.} and Huang, {J. Z.} and Wang, {S. J.} and Lee, {W. C.} and Lee, {P. T.} and Kao, {H. L.} and Albert Chin",

year = "2008",

month = dec,

day = "1",

doi = "10.1109/DRC.2008.4800739",

language = "English",

isbn = "9781424419425",

series = "Device Research Conference - Conference Digest, DRC",

pages = "71--72",

booktitle = "66th DRC Device Research Conference Digest, DRC 2008",

note = "66th DRC Device Research Conference Digest, DRC 2008 ; Conference date: 23-06-2008 Through 25-06-2008",

}

Su, NC, Wu, CH, Chang, MF, Huang, JZ, Wang, SJ, Lee, WC, Lee, PT, Kao, HL & Chin, A 2008, Gate-first low v_t Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing. in 66th DRC Device Research Conference Digest, DRC 2008., 4800739, Device Research Conference - Conference Digest, DRC, pp. 71-72, 66th DRC Device Research Conference Digest, DRC 2008, Santa Barbara, CA, United States, 08-06-23. https://doi.org/10.1109/DRC.2008.4800739

TY - GEN

T1 - Gate-first low vt Al/TaN/Ir/HfLaO p-mosfet using simple laser annealing

AU - Su, N. C.

AU - Wu, C. H.

AU - Chang, M. F.

AU - Huang, J. Z.

AU - Wang, S. J.

AU - Lee, W. C.

AU - Lee, P. T.

AU - Kao, H. L.

AU - Chin, Albert

PY - 2008/12/1

Y1 - 2008/12/1

N2 - Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (Vt) of -0.07 V and good peak hole mobility of 86 cm2/V-s at 1.5 nm equivalent-oxide thickness (EOT).

AB - Using excimer laser annealing and laser-reflective Al-covered gate, the self-aligned, gate-dielectric first and gate-electrode first Al/TaN/Ir/HfLaO p-MOSFET showed low threshold voltage (Vt) of -0.07 V and good peak hole mobility of 86 cm2/V-s at 1.5 nm equivalent-oxide thickness (EOT).

UR - http://www.scopus.com/inward/record.url?scp=64849097413&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=64849097413&partnerID=8YFLogxK

U2 - 10.1109/DRC.2008.4800739

DO - 10.1109/DRC.2008.4800739

M3 - Conference contribution

AN - SCOPUS:64849097413

SN - 9781424419425

T3 - Device Research Conference - Conference Digest, DRC

SP - 71

EP - 72

BT - 66th DRC Device Research Conference Digest, DRC 2008

T2 - 66th DRC Device Research Conference Digest, DRC 2008

Y2 - 23 June 2008 through 25 June 2008

ER -