This paper deals with the problem of general modular multiplication, i.e., A × B mod M. To solve it in hardware, we suggest a simple lookup-table based approach and use the novel block multiplier which we have developed earlier on. The area (A) and time (T) complexities of this multiplier are both O(n log n) if carry-lookahead adders are used. Most previously proposed modular multipliers have put restriction on the ranges of the multiplicand A, the multiplier B, and the modulus M. Our modular multiplier is general, which releases the restriction on those operands.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|Publication status||Published - 1994 Dec 1|
|Event||Proceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England|
Duration: 1994 May 30 → 1994 Jun 2
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering